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author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-07 18:49:45 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-07 18:49:45 +0000 |
commit | 2c3c1048746a4622d8c89a29670120dc8fab93c4 (patch) | |
tree | 848558de17fb3008cdf4d861b01ac7781903ce39 /drivers/staging/media/atomisp/pci/sh_css_mmu.c | |
parent | Initial commit. (diff) | |
download | linux-upstream.tar.xz linux-upstream.zip |
Adding upstream version 6.1.76.upstream/6.1.76upstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'drivers/staging/media/atomisp/pci/sh_css_mmu.c')
-rw-r--r-- | drivers/staging/media/atomisp/pci/sh_css_mmu.c | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/drivers/staging/media/atomisp/pci/sh_css_mmu.c b/drivers/staging/media/atomisp/pci/sh_css_mmu.c new file mode 100644 index 000000000..1da7459ea --- /dev/null +++ b/drivers/staging/media/atomisp/pci/sh_css_mmu.c @@ -0,0 +1,60 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_mmu.h" +#include "ia_css_mmu_private.h" +#include <ia_css_debug.h> +#include "sh_css_sp.h" +#include "sh_css_firmware.h" +#include "sp.h" +#include "mmu_device.h" + +void +ia_css_mmu_invalidate_cache(void) +{ + const struct ia_css_fw_info *fw = &sh_css_sp_fw; + unsigned int HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_mmu_invalidate_cache() enter\n"); + + /* if the SP is not running we should not access its dmem */ + if (sh_css_sp_is_running()) { + HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb = fw->info.sp.invalidate_tlb; + + (void)HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb; /* Suppres warnings in CRUN */ + + sp_dmem_store_uint32(SP0_ID, + (unsigned int)sp_address_of(ia_css_dmaproxy_sp_invalidate_tlb), + true); + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_mmu_invalidate_cache() leave\n"); +} + +void +sh_css_mmu_set_page_table_base_index(hrt_data base_index) +{ + int i; + + IA_CSS_ENTER_PRIVATE("base_index=0x%08x\n", base_index); + for (i = 0; i < N_MMU_ID; i++) { + mmu_ID_t mmu_id = i; + + mmu_set_page_table_base_index(mmu_id, base_index); + mmu_invalidate_cache(mmu_id); + } + IA_CSS_LEAVE_PRIVATE(""); +} |