summaryrefslogtreecommitdiffstats
path: root/tools/perf/pmu-events/arch/x86/knightslanding/virtual-memory.json
diff options
context:
space:
mode:
authorDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-07 18:49:45 +0000
committerDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-07 18:49:45 +0000
commit2c3c1048746a4622d8c89a29670120dc8fab93c4 (patch)
tree848558de17fb3008cdf4d861b01ac7781903ce39 /tools/perf/pmu-events/arch/x86/knightslanding/virtual-memory.json
parentInitial commit. (diff)
downloadlinux-upstream.tar.xz
linux-upstream.zip
Adding upstream version 6.1.76.upstream/6.1.76upstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'tools/perf/pmu-events/arch/x86/knightslanding/virtual-memory.json')
-rw-r--r--tools/perf/pmu-events/arch/x86/knightslanding/virtual-memory.json65
1 files changed, 65 insertions, 0 deletions
diff --git a/tools/perf/pmu-events/arch/x86/knightslanding/virtual-memory.json b/tools/perf/pmu-events/arch/x86/knightslanding/virtual-memory.json
new file mode 100644
index 000000000..821cdd44a
--- /dev/null
+++ b/tools/perf/pmu-events/arch/x86/knightslanding/virtual-memory.json
@@ -0,0 +1,65 @@
+[
+ {
+ "BriefDescription": "Counts the number of load micro-ops retired that cause a DTLB miss",
+ "Counter": "0,1",
+ "Data_LA": "1",
+ "EventCode": "0x04",
+ "EventName": "MEM_UOPS_RETIRED.DTLB_MISS_LOADS",
+ "PEBS": "1",
+ "SampleAfterValue": "200003",
+ "UMask": "0x8"
+ },
+ {
+ "BriefDescription": "Counts the total number of core cycles for all the page walks. The cycles for page walks started in speculative path will also be included.",
+ "Counter": "0,1",
+ "EventCode": "0x05",
+ "EventName": "PAGE_WALKS.CYCLES",
+ "PublicDescription": "This event counts every cycle when a data (D) page walk or instruction (I) page walk is in progress.",
+ "SampleAfterValue": "200003",
+ "UMask": "0x3"
+ },
+ {
+ "BriefDescription": "Counts the total number of core cycles for all the D-side page walks. The cycles for page walks started in speculative path will also be included.",
+ "Counter": "0,1",
+ "EventCode": "0x05",
+ "EventName": "PAGE_WALKS.D_SIDE_CYCLES",
+ "SampleAfterValue": "200003",
+ "UMask": "0x1"
+ },
+ {
+ "BriefDescription": "Counts the total D-side page walks that are completed or started. The page walks started in the speculative path will also be counted",
+ "Counter": "0,1",
+ "EdgeDetect": "1",
+ "EventCode": "0x05",
+ "EventName": "PAGE_WALKS.D_SIDE_WALKS",
+ "SampleAfterValue": "100003",
+ "UMask": "0x1"
+ },
+ {
+ "BriefDescription": "Counts the total number of core cycles for all the I-side page walks. The cycles for page walks started in speculative path will also be included.",
+ "Counter": "0,1",
+ "EventCode": "0x05",
+ "EventName": "PAGE_WALKS.I_SIDE_CYCLES",
+ "PublicDescription": "This event counts every cycle when an I-side (walks due to an instruction fetch) page walk is in progress.",
+ "SampleAfterValue": "200003",
+ "UMask": "0x2"
+ },
+ {
+ "BriefDescription": "Counts the total I-side page walks that are completed.",
+ "Counter": "0,1",
+ "EdgeDetect": "1",
+ "EventCode": "0x05",
+ "EventName": "PAGE_WALKS.I_SIDE_WALKS",
+ "SampleAfterValue": "100003",
+ "UMask": "0x2"
+ },
+ {
+ "BriefDescription": "Counts the total page walks that are completed (I-side and D-side)",
+ "Counter": "0,1",
+ "EdgeDetect": "1",
+ "EventCode": "0x05",
+ "EventName": "PAGE_WALKS.WALKS",
+ "SampleAfterValue": "100003",
+ "UMask": "0x3"
+ }
+]