diff options
Diffstat (limited to 'tools/perf/pmu-events/arch/x86/bonnell/pipeline.json')
| -rw-r--r-- | tools/perf/pmu-events/arch/x86/bonnell/pipeline.json | 356 |
1 files changed, 356 insertions, 0 deletions
diff --git a/tools/perf/pmu-events/arch/x86/bonnell/pipeline.json b/tools/perf/pmu-events/arch/x86/bonnell/pipeline.json new file mode 100644 index 000000000..f5123c99a --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/bonnell/pipeline.json @@ -0,0 +1,356 @@ +[ + { + "BriefDescription": "Bogus branches", + "Counter": "0,1", + "EventCode": "0xE4", + "EventName": "BOGUS_BR", + "SampleAfterValue": "2000000", + "UMask": "0x1" + }, + { + "BriefDescription": "Branch instructions decoded", + "Counter": "0,1", + "EventCode": "0xE0", + "EventName": "BR_INST_DECODED", + "SampleAfterValue": "2000000", + "UMask": "0x1" + }, + { + "BriefDescription": "Retired branch instructions.", + "Counter": "0,1", + "EventCode": "0xC4", + "EventName": "BR_INST_RETIRED.ANY", + "SampleAfterValue": "2000000", + "UMask": "0x0" + }, + { + "BriefDescription": "Retired branch instructions.", + "Counter": "0,1", + "EventCode": "0xC4", + "EventName": "BR_INST_RETIRED.ANY1", + "SampleAfterValue": "2000000", + "UMask": "0xf" + }, + { + "BriefDescription": "Retired mispredicted branch instructions (precise event).", + "Counter": "0,1", + "EventCode": "0xC5", + "EventName": "BR_INST_RETIRED.MISPRED", + "PEBS": "1", + "SampleAfterValue": "200000", + "UMask": "0x0" + }, + { + "BriefDescription": "Retired branch instructions that were mispredicted not-taken.", + "Counter": "0,1", + "EventCode": "0xC4", + "EventName": "BR_INST_RETIRED.MISPRED_NOT_TAKEN", + "SampleAfterValue": "200000", + "UMask": "0x2" + }, + { + "BriefDescription": "Retired branch instructions that were mispredicted taken.", + "Counter": "0,1", + "EventCode": "0xC4", + "EventName": "BR_INST_RETIRED.MISPRED_TAKEN", + "SampleAfterValue": "200000", + "UMask": "0x8" + }, + { + "BriefDescription": "Retired branch instructions that were predicted not-taken.", + "Counter": "0,1", + "EventCode": "0xC4", + "EventName": "BR_INST_RETIRED.PRED_NOT_TAKEN", + "SampleAfterValue": "2000000", + "UMask": "0x1" + }, + { + "BriefDescription": "Retired branch instructions that were predicted taken.", + "Counter": "0,1", + "EventCode": "0xC4", + "EventName": "BR_INST_RETIRED.PRED_TAKEN", + "SampleAfterValue": "2000000", + "UMask": "0x4" + }, + { + "BriefDescription": "Retired taken branch instructions.", + "Counter": "0,1", + "EventCode": "0xC4", + "EventName": "BR_INST_RETIRED.TAKEN", + "SampleAfterValue": "2000000", + "UMask": "0xc" + }, + { + "BriefDescription": "All macro conditional branch instructions.", + "Counter": "0,1", + "EventCode": "0x88", + "EventName": "BR_INST_TYPE_RETIRED.COND", + "SampleAfterValue": "2000000", + "UMask": "0x1" + }, + { + "BriefDescription": "Only taken macro conditional branch instructions", + "Counter": "0,1", + "EventCode": "0x88", + "EventName": "BR_INST_TYPE_RETIRED.COND_TAKEN", + "SampleAfterValue": "2000000", + "UMask": "0x41" + }, + { + "BriefDescription": "All non-indirect calls", + "Counter": "0,1", + "EventCode": "0x88", + "EventName": "BR_INST_TYPE_RETIRED.DIR_CALL", + "SampleAfterValue": "2000000", + "UMask": "0x10" + }, + { + "BriefDescription": "All indirect branches that are not calls.", + "Counter": "0,1", + "EventCode": "0x88", + "EventName": "BR_INST_TYPE_RETIRED.IND", + "SampleAfterValue": "2000000", + "UMask": "0x4" + }, + { + "BriefDescription": "All indirect calls, including both register and memory indirect.", + "Counter": "0,1", + "EventCode": "0x88", + "EventName": "BR_INST_TYPE_RETIRED.IND_CALL", + "SampleAfterValue": "2000000", + "UMask": "0x20" + }, + { + "BriefDescription": "All indirect branches that have a return mnemonic", + "Counter": "0,1", + "EventCode": "0x88", + "EventName": "BR_INST_TYPE_RETIRED.RET", + "SampleAfterValue": "2000000", + "UMask": "0x8" + }, + { + "BriefDescription": "All macro unconditional branch instructions, excluding calls and indirects", + "Counter": "0,1", + "EventCode": "0x88", + "EventName": "BR_INST_TYPE_RETIRED.UNCOND", + "SampleAfterValue": "2000000", + "UMask": "0x2" + }, + { + "BriefDescription": "Mispredicted cond branch instructions retired", + "Counter": "0,1", + "EventCode": "0x89", + "EventName": "BR_MISSP_TYPE_RETIRED.COND", + "SampleAfterValue": "200000", + "UMask": "0x1" + }, + { + "BriefDescription": "Mispredicted and taken cond branch instructions retired", + "Counter": "0,1", + "EventCode": "0x89", + "EventName": "BR_MISSP_TYPE_RETIRED.COND_TAKEN", + "SampleAfterValue": "200000", + "UMask": "0x11" + }, + { + "BriefDescription": "Mispredicted ind branches that are not calls", + "Counter": "0,1", + "EventCode": "0x89", + "EventName": "BR_MISSP_TYPE_RETIRED.IND", + "SampleAfterValue": "200000", + "UMask": "0x2" + }, + { + "BriefDescription": "Mispredicted indirect calls, including both register and memory indirect.", + "Counter": "0,1", + "EventCode": "0x89", + "EventName": "BR_MISSP_TYPE_RETIRED.IND_CALL", + "SampleAfterValue": "200000", + "UMask": "0x8" + }, + { + "BriefDescription": "Mispredicted return branches", + "Counter": "0,1", + "EventCode": "0x89", + "EventName": "BR_MISSP_TYPE_RETIRED.RETURN", + "SampleAfterValue": "200000", + "UMask": "0x4" + }, + { + "BriefDescription": "Bus cycles when core is not halted", + "Counter": "0,1", + "EventCode": "0x3C", + "EventName": "CPU_CLK_UNHALTED.BUS", + "SampleAfterValue": "200000", + "UMask": "0x1" + }, + { + "BriefDescription": "Core cycles when core is not halted", + "Counter": "Fixed counter 2", + "EventCode": "0xA", + "EventName": "CPU_CLK_UNHALTED.CORE", + "SampleAfterValue": "2000000", + "UMask": "0x0" + }, + { + "BriefDescription": "Core cycles when core is not halted", + "Counter": "0,1", + "EventCode": "0x3C", + "EventName": "CPU_CLK_UNHALTED.CORE_P", + "SampleAfterValue": "2000000", + "UMask": "0x0" + }, + { + "BriefDescription": "Reference cycles when core is not halted.", + "Counter": "Fixed counter 3", + "EventCode": "0xA", + "EventName": "CPU_CLK_UNHALTED.REF", + "SampleAfterValue": "2000000", + "UMask": "0x0" + }, + { + "BriefDescription": "Cycles the divider is busy.", + "Counter": "0,1", + "EventCode": "0x14", + "EventName": "CYCLES_DIV_BUSY", + "SampleAfterValue": "2000000", + "UMask": "0x1" + }, + { + "BriefDescription": "Divide operations retired", + "Counter": "0,1", + "EventCode": "0x13", + "EventName": "DIV.AR", + "SampleAfterValue": "2000000", + "UMask": "0x81" + }, + { + "BriefDescription": "Divide operations executed.", + "Counter": "0,1", + "EventCode": "0x13", + "EventName": "DIV.S", + "SampleAfterValue": "2000000", + "UMask": "0x1" + }, + { + "BriefDescription": "Instructions retired.", + "Counter": "Fixed counter 1", + "EventCode": "0xA", + "EventName": "INST_RETIRED.ANY", + "SampleAfterValue": "2000000", + "UMask": "0x0" + }, + { + "BriefDescription": "Instructions retired (precise event).", + "Counter": "0,1", + "EventCode": "0xC0", + "EventName": "INST_RETIRED.ANY_P", + "PEBS": "2", + "SampleAfterValue": "2000000", + "UMask": "0x0" + }, + { + "BriefDescription": "Self-Modifying Code detected.", + "Counter": "0,1", + "EventCode": "0xC3", + "EventName": "MACHINE_CLEARS.SMC", + "SampleAfterValue": "200000", + "UMask": "0x1" + }, + { + "BriefDescription": "Multiply operations retired", + "Counter": "0,1", + "EventCode": "0x12", + "EventName": "MUL.AR", + "SampleAfterValue": "2000000", + "UMask": "0x81" + }, + { + "BriefDescription": "Multiply operations executed.", + "Counter": "0,1", + "EventCode": "0x12", + "EventName": "MUL.S", + "SampleAfterValue": "2000000", + "UMask": "0x1" + }, + { + "BriefDescription": "Micro-op reissues for any cause", + "Counter": "0,1", + "EventCode": "0x3", + "EventName": "REISSUE.ANY", + "SampleAfterValue": "200000", + "UMask": "0x7f" + }, + { + "BriefDescription": "Micro-op reissues for any cause (At Retirement)", + "Counter": "0,1", + "EventCode": "0x3", + "EventName": "REISSUE.ANY.AR", + "SampleAfterValue": "200000", + "UMask": "0xff" + }, + { + "BriefDescription": "Micro-op reissues on a store-load collision", + "Counter": "0,1", + "EventCode": "0x3", + "EventName": "REISSUE.OVERLAP_STORE", + "SampleAfterValue": "200000", + "UMask": "0x1" + }, + { + "BriefDescription": "Micro-op reissues on a store-load collision (At Retirement)", + "Counter": "0,1", + "EventCode": "0x3", + "EventName": "REISSUE.OVERLAP_STORE.AR", + "SampleAfterValue": "200000", + "UMask": "0x81" + }, + { + "BriefDescription": "Cycles issue is stalled due to div busy.", + "Counter": "0,1", + "EventCode": "0xDC", + "EventName": "RESOURCE_STALLS.DIV_BUSY", + "SampleAfterValue": "2000000", + "UMask": "0x2" + }, + { + "BriefDescription": "All store forwards", + "Counter": "0,1", + "EventCode": "0x2", + "EventName": "STORE_FORWARDS.ANY", + "SampleAfterValue": "200000", + "UMask": "0x83" + }, + { + "BriefDescription": "Good store forwards", + "Counter": "0,1", + "EventCode": "0x2", + "EventName": "STORE_FORWARDS.GOOD", + "SampleAfterValue": "200000", + "UMask": "0x81" + }, + { + "BriefDescription": "Micro-ops retired.", + "Counter": "0,1", + "EventCode": "0xC2", + "EventName": "UOPS_RETIRED.ANY", + "SampleAfterValue": "2000000", + "UMask": "0x10" + }, + { + "BriefDescription": "Cycles no micro-ops retired.", + "Counter": "0,1", + "EventCode": "0xC2", + "EventName": "UOPS_RETIRED.STALLED_CYCLES", + "SampleAfterValue": "2000000", + "UMask": "0x10" + }, + { + "BriefDescription": "Periods no micro-ops retired.", + "Counter": "0,1", + "EventCode": "0xC2", + "EventName": "UOPS_RETIRED.STALLS", + "SampleAfterValue": "2000000", + "UMask": "0x10" + } +] |