summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml
blob: b391cc1b4590676483d73e6f8141ec059522a86b (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/gpio/snps,dw-apb-gpio.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Synopsys DesignWare APB GPIO controller

description: |
  Synopsys DesignWare GPIO controllers have a configurable number of ports,
  each of which are intended to be represented as child nodes with the generic
  GPIO-controller properties as desribed in this bindings file.

maintainers:
  - Hoan Tran <hoan@os.amperecomputing.com>
  - Serge Semin <fancer.lancer@gmail.com>

properties:
  $nodename:
    pattern: "^gpio@[0-9a-f]+$"

  compatible:
    const: snps,dw-apb-gpio

  "#address-cells":
    const: 1

  "#size-cells":
    const: 0

  reg:
    maxItems: 1

  clocks:
    minItems: 1
    items:
      - description: APB interface clock source
      - description: DW GPIO debounce reference clock source

  clock-names:
    minItems: 1
    items:
      - const: bus
      - const: db

  resets:
    maxItems: 1

patternProperties:
  "^gpio-(port|controller)@[0-9a-f]+$":
    type: object
    properties:
      compatible:
        const: snps,dw-apb-gpio-port

      reg:
        maxItems: 1

      gpio-controller: true

      '#gpio-cells':
        const: 2

      ngpios:
        default: 32
        minimum: 1
        maximum: 32

      snps,nr-gpios:
        description: The number of GPIO pins exported by the port.
        deprecated: true
        $ref: /schemas/types.yaml#/definitions/uint32
        default: 32
        minimum: 1
        maximum: 32

      interrupts:
        description: |
          The interrupts to the parent controller raised when GPIOs generate
          the interrupts. If the controller provides one combined interrupt
          for all GPIOs, specify a single interrupt. If the controller provides
          one interrupt for each GPIO, provide a list of interrupts that
          correspond to each of the GPIO pins.
        minItems: 1
        maxItems: 32

      interrupt-controller: true

      '#interrupt-cells':
        const: 2

    required:
      - compatible
      - reg
      - gpio-controller
      - '#gpio-cells'

    dependencies:
      interrupt-controller: [ interrupts ]

    additionalProperties: false

additionalProperties: false

required:
  - compatible
  - reg
  - "#address-cells"
  - "#size-cells"

examples:
  - |
    gpio: gpio@20000 {
      compatible = "snps,dw-apb-gpio";
      reg = <0x20000 0x1000>;
      #address-cells = <1>;
      #size-cells = <0>;

      porta: gpio-port@0 {
        compatible = "snps,dw-apb-gpio-port";
        reg = <0>;
        gpio-controller;
        #gpio-cells = <2>;
        snps,nr-gpios = <8>;
        interrupt-controller;
        #interrupt-cells = <2>;
        interrupt-parent = <&vic1>;
        interrupts = <0>;
      };

      portb: gpio-port@1 {
        compatible = "snps,dw-apb-gpio-port";
        reg = <1>;
        gpio-controller;
        #gpio-cells = <2>;
        snps,nr-gpios = <8>;
      };
    };
...