summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/mips/lantiq/fpi-bus.txt
blob: 0a2df433833202fd80903720d9ca9e45dad306ba (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Lantiq XWAY SoC FPI BUS binding
============================


-------------------------------------------------------------------------------
Required properties:
- compatible			: Should be one of
					"lantiq,xrx200-fpi"
- reg				: The address and length of the XBAR
				  configuration register.
				  Address and length of the FPI bus itself.
- lantiq,rcu			: A phandle to the RCU syscon
- lantiq,offset-endianness	: Offset of the endianness configuration
				  register

-------------------------------------------------------------------------------
Example for the FPI on the xrx200 SoCs:
	fpi@10000000 {
		compatible = "lantiq,xrx200-fpi";
		ranges = <0x0 0x10000000 0xf000000>;
		reg =	<0x1f400000 0x1000>,
			<0x10000000 0xf000000>;
		lantiq,rcu = <&rcu0>;
		lantiq,offset-endianness = <0x4c>;
		#address-cells = <1>;
		#size-cells = <1>;

		gptu@e100a00 {
			......
		};
	};