summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/mtd/oxnas-nand.txt
blob: 2ba07fc8b79c91bce24e8246e35bcb930b78b808 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
* Oxford Semiconductor OXNAS NAND Controller

Please refer to nand-controller.yaml for generic information regarding MTD NAND bindings.

Required properties:
 - compatible: "oxsemi,ox820-nand"
 - reg: Base address and length for NAND mapped memory.

Optional Properties:
 - clocks: phandle to the NAND gate clock if needed.
 - resets: phandle to the NAND reset control if needed.

Example:

nandc: nand-controller@41000000 {
	compatible = "oxsemi,ox820-nand";
	reg = <0x41000000 0x100000>;
	clocks = <&stdclk CLK_820_NAND>;
	resets = <&reset RESET_NAND>;
	#address-cells = <1>;
	#size-cells = <0>;

	nand@0 {
		reg = <0>;
		#address-cells = <1>;
		#size-cells = <1>;
		nand-ecc-mode = "soft";
		nand-ecc-algo = "hamming";

		partition@0 {
			label = "boot";
			reg = <0x00000000 0x00e00000>;
			read-only;
		};

		partition@e00000 {
			label = "ubi";
			reg = <0x00e00000 0x07200000>;
		};
	};
};