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From: Aurelien Jarno <aurelien@aurel32.net>
Date: Fri, 30 Sep 2022 07:12:43 +0200
Subject: [10/13] arm64: dts: rockchip: Enable the USB 3.0 ports on ODROID-M1
Origin: https://git.kernel.org/linus/9984ef562653c8d0beb51021fc286706b6ec4802
The Rockchip RK3568 has two USB XHCI controllers. The USB 2.0 signals
are connected to a PHY providing one host-only port and one OTG port.
The USB 3.0 signals are connected to two USB3.0/PCIE/SATA combo PHY.
The ODROID M1 has 2 type A USB 3.0 connectors, with the USB 3.0 signals
connected to the two combo PHYs. For the USB 2.0 signals, one connector
is connected to the host-only PHY and uses the same power switch as the
USB 2.0 ports. The other connector has its own power switch and is
connected to the OTG PHY, which is also connected to a device only
micro-USB connector. The purpose of this micro-USB connector is for
firmware update using the Rockusb vendor specific USB class. Therefore
it does not make sense to enable this port on Linux, and the PHY is
forced to host mode.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20220930051246.391614-11-aurelien@aurel32.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3568-odroid-m1.dts | 49 ++++++++++++++++++-
1 file changed, 48 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
index 2e4cc20bd676..9a84a7e76d7a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
@@ -127,6 +127,30 @@ vcc5v0_usb_host: vcc5v0-usb-host-regulator {
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
+
+ vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_usb_otg";
+ enable-active-high;
+ gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_usb_otg_en_pin>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+};
+
+&combphy0 {
+ /* Used for USB3 */
+ phy-supply = <&vcc5v0_usb_host>;
+ status = "okay";
+};
+
+&combphy1 {
+ /* Used for USB3 */
+ phy-supply = <&vcc5v0_usb_otg>;
+ status = "okay";
};
&cpu0 {
@@ -490,7 +514,7 @@ usb {
vcc5v0_usb_host_en_pin: vcc5v0-usb-host-en-pin {
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
- vcc5v0_usb_otg_en_pin: vcc5v0-usb-otg-en-pin {
+ vcc5v0_usb_otg_en_pin: vcc5v0-usb-dr-en-pin {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
@@ -600,6 +624,11 @@ &usb_host0_ohci {
status = "okay";
};
+&usb_host0_xhci {
+ dr_mode = "host";
+ status = "okay";
+};
+
&usb_host1_ehci {
status = "okay";
};
@@ -608,6 +637,24 @@ &usb_host1_ohci {
status = "okay";
};
+&usb_host1_xhci {
+ status = "okay";
+};
+
+&usb2phy0 {
+ status = "okay";
+};
+
+&usb2phy0_host {
+ phy-supply = <&vcc5v0_usb_host>;
+ status = "okay";
+};
+
+&usb2phy0_otg {
+ phy-supply = <&vcc5v0_usb_otg>;
+ status = "okay";
+};
+
&usb2phy1 {
status = "okay";
};
--
2.35.1
|
