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-rw-r--r--media/libvpx/libvpx/vp9/common/arm/neon/vp9_highbd_iht16x16_add_neon.c446
-rw-r--r--media/libvpx/libvpx/vp9/common/arm/neon/vp9_highbd_iht4x4_add_neon.c181
-rw-r--r--media/libvpx/libvpx/vp9/common/arm/neon/vp9_highbd_iht8x8_add_neon.c345
-rw-r--r--media/libvpx/libvpx/vp9/common/arm/neon/vp9_iht16x16_add_neon.c279
-rw-r--r--media/libvpx/libvpx/vp9/common/arm/neon/vp9_iht4x4_add_neon.c76
-rw-r--r--media/libvpx/libvpx/vp9/common/arm/neon/vp9_iht8x8_add_neon.c68
-rw-r--r--media/libvpx/libvpx/vp9/common/arm/neon/vp9_iht_neon.h272
7 files changed, 1667 insertions, 0 deletions
diff --git a/media/libvpx/libvpx/vp9/common/arm/neon/vp9_highbd_iht16x16_add_neon.c b/media/libvpx/libvpx/vp9/common/arm/neon/vp9_highbd_iht16x16_add_neon.c
new file mode 100644
index 0000000000..aeb7e49c10
--- /dev/null
+++ b/media/libvpx/libvpx/vp9/common/arm/neon/vp9_highbd_iht16x16_add_neon.c
@@ -0,0 +1,446 @@
+/*
+ * Copyright (c) 2018 The WebM project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ */
+
+#include <arm_neon.h>
+
+#include "./vpx_dsp_rtcd.h"
+#include "vp9/common/vp9_enums.h"
+#include "vp9/common/arm/neon/vp9_iht_neon.h"
+#include "vpx_dsp/arm/highbd_idct_neon.h"
+#include "vpx_dsp/arm/idct_neon.h"
+#include "vpx_dsp/arm/transpose_neon.h"
+#include "vpx_dsp/inv_txfm.h"
+
+// Use macros to make sure argument lane is passed in as an constant integer.
+
+#define vmull_lane_s32_dual(in, c, lane, out) \
+ do { \
+ out[0].val[0] = vmull_lane_s32(vget_low_s32(in.val[0]), c, lane); \
+ out[0].val[1] = vmull_lane_s32(vget_low_s32(in.val[1]), c, lane); \
+ out[1].val[0] = vmull_lane_s32(vget_high_s32(in.val[0]), c, lane); \
+ out[1].val[1] = vmull_lane_s32(vget_high_s32(in.val[1]), c, lane); \
+ } while (0)
+
+#define vmlal_lane_s32_dual(in, c, lane, out) \
+ do { \
+ out[0].val[0] = \
+ vmlal_lane_s32(out[0].val[0], vget_low_s32(in.val[0]), c, lane); \
+ out[0].val[1] = \
+ vmlal_lane_s32(out[0].val[1], vget_low_s32(in.val[1]), c, lane); \
+ out[1].val[0] = \
+ vmlal_lane_s32(out[1].val[0], vget_high_s32(in.val[0]), c, lane); \
+ out[1].val[1] = \
+ vmlal_lane_s32(out[1].val[1], vget_high_s32(in.val[1]), c, lane); \
+ } while (0)
+
+#define vmlsl_lane_s32_dual(in, c, lane, out) \
+ do { \
+ out[0].val[0] = \
+ vmlsl_lane_s32(out[0].val[0], vget_low_s32(in.val[0]), c, lane); \
+ out[0].val[1] = \
+ vmlsl_lane_s32(out[0].val[1], vget_low_s32(in.val[1]), c, lane); \
+ out[1].val[0] = \
+ vmlsl_lane_s32(out[1].val[0], vget_high_s32(in.val[0]), c, lane); \
+ out[1].val[1] = \
+ vmlsl_lane_s32(out[1].val[1], vget_high_s32(in.val[1]), c, lane); \
+ } while (0)
+
+static INLINE int32x4x2_t
+highbd_dct_const_round_shift_low_8(const int64x2x2_t *const in) {
+ int32x4x2_t out;
+ out.val[0] = vcombine_s32(vrshrn_n_s64(in[0].val[0], DCT_CONST_BITS),
+ vrshrn_n_s64(in[1].val[0], DCT_CONST_BITS));
+ out.val[1] = vcombine_s32(vrshrn_n_s64(in[0].val[1], DCT_CONST_BITS),
+ vrshrn_n_s64(in[1].val[1], DCT_CONST_BITS));
+ return out;
+}
+
+#define highbd_iadst_half_butterfly(in, c, lane, out) \
+ do { \
+ int64x2x2_t _t[2]; \
+ vmull_lane_s32_dual(in, c, lane, _t); \
+ out = highbd_dct_const_round_shift_low_8(_t); \
+ } while (0)
+
+#define highbd_iadst_butterfly(in0, in1, c, lane0, lane1, s0, s1) \
+ do { \
+ vmull_lane_s32_dual(in0, c, lane0, s0); \
+ vmull_lane_s32_dual(in0, c, lane1, s1); \
+ vmlal_lane_s32_dual(in1, c, lane1, s0); \
+ vmlsl_lane_s32_dual(in1, c, lane0, s1); \
+ } while (0)
+
+static INLINE int32x4x2_t vaddq_s32_dual(const int32x4x2_t in0,
+ const int32x4x2_t in1) {
+ int32x4x2_t out;
+ out.val[0] = vaddq_s32(in0.val[0], in1.val[0]);
+ out.val[1] = vaddq_s32(in0.val[1], in1.val[1]);
+ return out;
+}
+
+static INLINE int64x2x2_t vaddq_s64_dual(const int64x2x2_t in0,
+ const int64x2x2_t in1) {
+ int64x2x2_t out;
+ out.val[0] = vaddq_s64(in0.val[0], in1.val[0]);
+ out.val[1] = vaddq_s64(in0.val[1], in1.val[1]);
+ return out;
+}
+
+static INLINE int32x4x2_t vsubq_s32_dual(const int32x4x2_t in0,
+ const int32x4x2_t in1) {
+ int32x4x2_t out;
+ out.val[0] = vsubq_s32(in0.val[0], in1.val[0]);
+ out.val[1] = vsubq_s32(in0.val[1], in1.val[1]);
+ return out;
+}
+
+static INLINE int64x2x2_t vsubq_s64_dual(const int64x2x2_t in0,
+ const int64x2x2_t in1) {
+ int64x2x2_t out;
+ out.val[0] = vsubq_s64(in0.val[0], in1.val[0]);
+ out.val[1] = vsubq_s64(in0.val[1], in1.val[1]);
+ return out;
+}
+
+static INLINE int32x4x2_t vcombine_s32_dual(const int32x2x2_t in0,
+ const int32x2x2_t in1) {
+ int32x4x2_t out;
+ out.val[0] = vcombine_s32(in0.val[0], in1.val[0]);
+ out.val[1] = vcombine_s32(in0.val[1], in1.val[1]);
+ return out;
+}
+
+static INLINE int32x4x2_t highbd_add_dct_const_round_shift_low_8(
+ const int64x2x2_t *const in0, const int64x2x2_t *const in1) {
+ const int64x2x2_t sum_lo = vaddq_s64_dual(in0[0], in1[0]);
+ const int64x2x2_t sum_hi = vaddq_s64_dual(in0[1], in1[1]);
+ int32x2x2_t out_lo, out_hi;
+
+ out_lo.val[0] = vrshrn_n_s64(sum_lo.val[0], DCT_CONST_BITS);
+ out_lo.val[1] = vrshrn_n_s64(sum_lo.val[1], DCT_CONST_BITS);
+ out_hi.val[0] = vrshrn_n_s64(sum_hi.val[0], DCT_CONST_BITS);
+ out_hi.val[1] = vrshrn_n_s64(sum_hi.val[1], DCT_CONST_BITS);
+ return vcombine_s32_dual(out_lo, out_hi);
+}
+
+static INLINE int32x4x2_t highbd_sub_dct_const_round_shift_low_8(
+ const int64x2x2_t *const in0, const int64x2x2_t *const in1) {
+ const int64x2x2_t sub_lo = vsubq_s64_dual(in0[0], in1[0]);
+ const int64x2x2_t sub_hi = vsubq_s64_dual(in0[1], in1[1]);
+ int32x2x2_t out_lo, out_hi;
+
+ out_lo.val[0] = vrshrn_n_s64(sub_lo.val[0], DCT_CONST_BITS);
+ out_lo.val[1] = vrshrn_n_s64(sub_lo.val[1], DCT_CONST_BITS);
+ out_hi.val[0] = vrshrn_n_s64(sub_hi.val[0], DCT_CONST_BITS);
+ out_hi.val[1] = vrshrn_n_s64(sub_hi.val[1], DCT_CONST_BITS);
+ return vcombine_s32_dual(out_lo, out_hi);
+}
+
+static INLINE int32x4x2_t vnegq_s32_dual(const int32x4x2_t in) {
+ int32x4x2_t out;
+ out.val[0] = vnegq_s32(in.val[0]);
+ out.val[1] = vnegq_s32(in.val[1]);
+ return out;
+}
+
+static void highbd_iadst16_neon(const int32_t *input, int32_t *output,
+ uint16_t *dest, const int stride,
+ const int bd) {
+ const int32x4_t c_1_31_5_27 =
+ create_s32x4_neon(cospi_1_64, cospi_31_64, cospi_5_64, cospi_27_64);
+ const int32x4_t c_9_23_13_19 =
+ create_s32x4_neon(cospi_9_64, cospi_23_64, cospi_13_64, cospi_19_64);
+ const int32x4_t c_17_15_21_11 =
+ create_s32x4_neon(cospi_17_64, cospi_15_64, cospi_21_64, cospi_11_64);
+ const int32x4_t c_25_7_29_3 =
+ create_s32x4_neon(cospi_25_64, cospi_7_64, cospi_29_64, cospi_3_64);
+ const int32x4_t c_4_28_20_12 =
+ create_s32x4_neon(cospi_4_64, cospi_28_64, cospi_20_64, cospi_12_64);
+ const int32x4_t c_16_n16_8_24 =
+ create_s32x4_neon(cospi_16_64, -cospi_16_64, cospi_8_64, cospi_24_64);
+ int32x4x2_t in[16], out[16];
+ int32x4x2_t x[16], t[12];
+ int64x2x2_t s0[2], s1[2], s2[2], s3[2], s4[2], s5[2], s6[2], s7[2];
+ int64x2x2_t s8[2], s9[2], s10[2], s11[2], s12[2], s13[2], s14[2], s15[2];
+
+ // Load input (16x8)
+ in[0].val[0] = vld1q_s32(input);
+ in[0].val[1] = vld1q_s32(input + 4);
+ input += 8;
+ in[8].val[0] = vld1q_s32(input);
+ in[8].val[1] = vld1q_s32(input + 4);
+ input += 8;
+ in[1].val[0] = vld1q_s32(input);
+ in[1].val[1] = vld1q_s32(input + 4);
+ input += 8;
+ in[9].val[0] = vld1q_s32(input);
+ in[9].val[1] = vld1q_s32(input + 4);
+ input += 8;
+ in[2].val[0] = vld1q_s32(input);
+ in[2].val[1] = vld1q_s32(input + 4);
+ input += 8;
+ in[10].val[0] = vld1q_s32(input);
+ in[10].val[1] = vld1q_s32(input + 4);
+ input += 8;
+ in[3].val[0] = vld1q_s32(input);
+ in[3].val[1] = vld1q_s32(input + 4);
+ input += 8;
+ in[11].val[0] = vld1q_s32(input);
+ in[11].val[1] = vld1q_s32(input + 4);
+ input += 8;
+ in[4].val[0] = vld1q_s32(input);
+ in[4].val[1] = vld1q_s32(input + 4);
+ input += 8;
+ in[12].val[0] = vld1q_s32(input);
+ in[12].val[1] = vld1q_s32(input + 4);
+ input += 8;
+ in[5].val[0] = vld1q_s32(input);
+ in[5].val[1] = vld1q_s32(input + 4);
+ input += 8;
+ in[13].val[0] = vld1q_s32(input);
+ in[13].val[1] = vld1q_s32(input + 4);
+ input += 8;
+ in[6].val[0] = vld1q_s32(input);
+ in[6].val[1] = vld1q_s32(input + 4);
+ input += 8;
+ in[14].val[0] = vld1q_s32(input);
+ in[14].val[1] = vld1q_s32(input + 4);
+ input += 8;
+ in[7].val[0] = vld1q_s32(input);
+ in[7].val[1] = vld1q_s32(input + 4);
+ input += 8;
+ in[15].val[0] = vld1q_s32(input);
+ in[15].val[1] = vld1q_s32(input + 4);
+
+ // Transpose
+ transpose_s32_8x8(&in[0], &in[1], &in[2], &in[3], &in[4], &in[5], &in[6],
+ &in[7]);
+ transpose_s32_8x8(&in[8], &in[9], &in[10], &in[11], &in[12], &in[13], &in[14],
+ &in[15]);
+
+ x[0] = in[15];
+ x[1] = in[0];
+ x[2] = in[13];
+ x[3] = in[2];
+ x[4] = in[11];
+ x[5] = in[4];
+ x[6] = in[9];
+ x[7] = in[6];
+ x[8] = in[7];
+ x[9] = in[8];
+ x[10] = in[5];
+ x[11] = in[10];
+ x[12] = in[3];
+ x[13] = in[12];
+ x[14] = in[1];
+ x[15] = in[14];
+
+ // stage 1
+ highbd_iadst_butterfly(x[0], x[1], vget_low_s32(c_1_31_5_27), 0, 1, s0, s1);
+ highbd_iadst_butterfly(x[2], x[3], vget_high_s32(c_1_31_5_27), 0, 1, s2, s3);
+ highbd_iadst_butterfly(x[4], x[5], vget_low_s32(c_9_23_13_19), 0, 1, s4, s5);
+ highbd_iadst_butterfly(x[6], x[7], vget_high_s32(c_9_23_13_19), 0, 1, s6, s7);
+ highbd_iadst_butterfly(x[8], x[9], vget_low_s32(c_17_15_21_11), 0, 1, s8, s9);
+ highbd_iadst_butterfly(x[10], x[11], vget_high_s32(c_17_15_21_11), 0, 1, s10,
+ s11);
+ highbd_iadst_butterfly(x[12], x[13], vget_low_s32(c_25_7_29_3), 0, 1, s12,
+ s13);
+ highbd_iadst_butterfly(x[14], x[15], vget_high_s32(c_25_7_29_3), 0, 1, s14,
+ s15);
+
+ x[0] = highbd_add_dct_const_round_shift_low_8(s0, s8);
+ x[1] = highbd_add_dct_const_round_shift_low_8(s1, s9);
+ x[2] = highbd_add_dct_const_round_shift_low_8(s2, s10);
+ x[3] = highbd_add_dct_const_round_shift_low_8(s3, s11);
+ x[4] = highbd_add_dct_const_round_shift_low_8(s4, s12);
+ x[5] = highbd_add_dct_const_round_shift_low_8(s5, s13);
+ x[6] = highbd_add_dct_const_round_shift_low_8(s6, s14);
+ x[7] = highbd_add_dct_const_round_shift_low_8(s7, s15);
+ x[8] = highbd_sub_dct_const_round_shift_low_8(s0, s8);
+ x[9] = highbd_sub_dct_const_round_shift_low_8(s1, s9);
+ x[10] = highbd_sub_dct_const_round_shift_low_8(s2, s10);
+ x[11] = highbd_sub_dct_const_round_shift_low_8(s3, s11);
+ x[12] = highbd_sub_dct_const_round_shift_low_8(s4, s12);
+ x[13] = highbd_sub_dct_const_round_shift_low_8(s5, s13);
+ x[14] = highbd_sub_dct_const_round_shift_low_8(s6, s14);
+ x[15] = highbd_sub_dct_const_round_shift_low_8(s7, s15);
+
+ // stage 2
+ t[0] = x[0];
+ t[1] = x[1];
+ t[2] = x[2];
+ t[3] = x[3];
+ t[4] = x[4];
+ t[5] = x[5];
+ t[6] = x[6];
+ t[7] = x[7];
+ highbd_iadst_butterfly(x[8], x[9], vget_low_s32(c_4_28_20_12), 0, 1, s8, s9);
+ highbd_iadst_butterfly(x[10], x[11], vget_high_s32(c_4_28_20_12), 0, 1, s10,
+ s11);
+ highbd_iadst_butterfly(x[13], x[12], vget_low_s32(c_4_28_20_12), 1, 0, s13,
+ s12);
+ highbd_iadst_butterfly(x[15], x[14], vget_high_s32(c_4_28_20_12), 1, 0, s15,
+ s14);
+
+ x[0] = vaddq_s32_dual(t[0], t[4]);
+ x[1] = vaddq_s32_dual(t[1], t[5]);
+ x[2] = vaddq_s32_dual(t[2], t[6]);
+ x[3] = vaddq_s32_dual(t[3], t[7]);
+ x[4] = vsubq_s32_dual(t[0], t[4]);
+ x[5] = vsubq_s32_dual(t[1], t[5]);
+ x[6] = vsubq_s32_dual(t[2], t[6]);
+ x[7] = vsubq_s32_dual(t[3], t[7]);
+ x[8] = highbd_add_dct_const_round_shift_low_8(s8, s12);
+ x[9] = highbd_add_dct_const_round_shift_low_8(s9, s13);
+ x[10] = highbd_add_dct_const_round_shift_low_8(s10, s14);
+ x[11] = highbd_add_dct_const_round_shift_low_8(s11, s15);
+ x[12] = highbd_sub_dct_const_round_shift_low_8(s8, s12);
+ x[13] = highbd_sub_dct_const_round_shift_low_8(s9, s13);
+ x[14] = highbd_sub_dct_const_round_shift_low_8(s10, s14);
+ x[15] = highbd_sub_dct_const_round_shift_low_8(s11, s15);
+
+ // stage 3
+ t[0] = x[0];
+ t[1] = x[1];
+ t[2] = x[2];
+ t[3] = x[3];
+ highbd_iadst_butterfly(x[4], x[5], vget_high_s32(c_16_n16_8_24), 0, 1, s4,
+ s5);
+ highbd_iadst_butterfly(x[7], x[6], vget_high_s32(c_16_n16_8_24), 1, 0, s7,
+ s6);
+ t[8] = x[8];
+ t[9] = x[9];
+ t[10] = x[10];
+ t[11] = x[11];
+ highbd_iadst_butterfly(x[12], x[13], vget_high_s32(c_16_n16_8_24), 0, 1, s12,
+ s13);
+ highbd_iadst_butterfly(x[15], x[14], vget_high_s32(c_16_n16_8_24), 1, 0, s15,
+ s14);
+
+ x[0] = vaddq_s32_dual(t[0], t[2]);
+ x[1] = vaddq_s32_dual(t[1], t[3]);
+ x[2] = vsubq_s32_dual(t[0], t[2]);
+ x[3] = vsubq_s32_dual(t[1], t[3]);
+ x[4] = highbd_add_dct_const_round_shift_low_8(s4, s6);
+ x[5] = highbd_add_dct_const_round_shift_low_8(s5, s7);
+ x[6] = highbd_sub_dct_const_round_shift_low_8(s4, s6);
+ x[7] = highbd_sub_dct_const_round_shift_low_8(s5, s7);
+ x[8] = vaddq_s32_dual(t[8], t[10]);
+ x[9] = vaddq_s32_dual(t[9], t[11]);
+ x[10] = vsubq_s32_dual(t[8], t[10]);
+ x[11] = vsubq_s32_dual(t[9], t[11]);
+ x[12] = highbd_add_dct_const_round_shift_low_8(s12, s14);
+ x[13] = highbd_add_dct_const_round_shift_low_8(s13, s15);
+ x[14] = highbd_sub_dct_const_round_shift_low_8(s12, s14);
+ x[15] = highbd_sub_dct_const_round_shift_low_8(s13, s15);
+
+ // stage 4
+ {
+ const int32x4x2_t sum = vaddq_s32_dual(x[2], x[3]);
+ const int32x4x2_t sub = vsubq_s32_dual(x[2], x[3]);
+ highbd_iadst_half_butterfly(sum, vget_low_s32(c_16_n16_8_24), 1, x[2]);
+ highbd_iadst_half_butterfly(sub, vget_low_s32(c_16_n16_8_24), 0, x[3]);
+ }
+ {
+ const int32x4x2_t sum = vaddq_s32_dual(x[7], x[6]);
+ const int32x4x2_t sub = vsubq_s32_dual(x[7], x[6]);
+ highbd_iadst_half_butterfly(sum, vget_low_s32(c_16_n16_8_24), 0, x[6]);
+ highbd_iadst_half_butterfly(sub, vget_low_s32(c_16_n16_8_24), 0, x[7]);
+ }
+ {
+ const int32x4x2_t sum = vaddq_s32_dual(x[11], x[10]);
+ const int32x4x2_t sub = vsubq_s32_dual(x[11], x[10]);
+ highbd_iadst_half_butterfly(sum, vget_low_s32(c_16_n16_8_24), 0, x[10]);
+ highbd_iadst_half_butterfly(sub, vget_low_s32(c_16_n16_8_24), 0, x[11]);
+ }
+ {
+ const int32x4x2_t sum = vaddq_s32_dual(x[14], x[15]);
+ const int32x4x2_t sub = vsubq_s32_dual(x[14], x[15]);
+ highbd_iadst_half_butterfly(sum, vget_low_s32(c_16_n16_8_24), 1, x[14]);
+ highbd_iadst_half_butterfly(sub, vget_low_s32(c_16_n16_8_24), 0, x[15]);
+ }
+
+ out[0] = x[0];
+ out[1] = vnegq_s32_dual(x[8]);
+ out[2] = x[12];
+ out[3] = vnegq_s32_dual(x[4]);
+ out[4] = x[6];
+ out[5] = x[14];
+ out[6] = x[10];
+ out[7] = x[2];
+ out[8] = x[3];
+ out[9] = x[11];
+ out[10] = x[15];
+ out[11] = x[7];
+ out[12] = x[5];
+ out[13] = vnegq_s32_dual(x[13]);
+ out[14] = x[9];
+ out[15] = vnegq_s32_dual(x[1]);
+
+ if (output) {
+ highbd_idct16x16_store_pass1(out, output);
+ } else {
+ highbd_idct16x16_add_store(out, dest, stride, bd);
+ }
+}
+
+typedef void (*highbd_iht_1d)(const int32_t *input, int32_t *output,
+ uint16_t *dest, const int stride, const int bd);
+
+typedef struct {
+ highbd_iht_1d cols, rows; // vertical and horizontal
+} highbd_iht_2d;
+
+void vp9_highbd_iht16x16_256_add_neon(const tran_low_t *input, uint16_t *dest,
+ int stride, int tx_type, int bd) {
+ if (bd == 8) {
+ static const iht_2d IHT_16[] = {
+ { vpx_idct16x16_256_add_half1d,
+ vpx_idct16x16_256_add_half1d }, // DCT_DCT = 0
+ { vpx_iadst16x16_256_add_half1d,
+ vpx_idct16x16_256_add_half1d }, // ADST_DCT = 1
+ { vpx_idct16x16_256_add_half1d,
+ vpx_iadst16x16_256_add_half1d }, // DCT_ADST = 2
+ { vpx_iadst16x16_256_add_half1d,
+ vpx_iadst16x16_256_add_half1d } // ADST_ADST = 3
+ };
+ const iht_2d ht = IHT_16[tx_type];
+ int16_t row_output[16 * 16];
+
+ // pass 1
+ ht.rows(input, row_output, dest, stride, 1); // upper 8 rows
+ ht.rows(input + 8 * 16, row_output + 8, dest, stride, 1); // lower 8 rows
+
+ // pass 2
+ ht.cols(row_output, NULL, dest, stride, 1); // left 8 columns
+ ht.cols(row_output + 16 * 8, NULL, dest + 8, stride, 1); // right 8 columns
+ } else {
+ static const highbd_iht_2d IHT_16[] = {
+ { vpx_highbd_idct16x16_256_add_half1d,
+ vpx_highbd_idct16x16_256_add_half1d }, // DCT_DCT = 0
+ { highbd_iadst16_neon,
+ vpx_highbd_idct16x16_256_add_half1d }, // ADST_DCT = 1
+ { vpx_highbd_idct16x16_256_add_half1d,
+ highbd_iadst16_neon }, // DCT_ADST = 2
+ { highbd_iadst16_neon, highbd_iadst16_neon } // ADST_ADST = 3
+ };
+ const highbd_iht_2d ht = IHT_16[tx_type];
+ int32_t row_output[16 * 16];
+
+ // pass 1
+ ht.rows(input, row_output, dest, stride, bd); // upper 8 rows
+ ht.rows(input + 8 * 16, row_output + 8, dest, stride, bd); // lower 8 rows
+
+ // pass 2
+ ht.cols(row_output, NULL, dest, stride, bd); // left 8 columns
+ ht.cols(row_output + 8 * 16, NULL, dest + 8, stride,
+ bd); // right 8 columns
+ }
+}
diff --git a/media/libvpx/libvpx/vp9/common/arm/neon/vp9_highbd_iht4x4_add_neon.c b/media/libvpx/libvpx/vp9/common/arm/neon/vp9_highbd_iht4x4_add_neon.c
new file mode 100644
index 0000000000..52c4f1937d
--- /dev/null
+++ b/media/libvpx/libvpx/vp9/common/arm/neon/vp9_highbd_iht4x4_add_neon.c
@@ -0,0 +1,181 @@
+/*
+ * Copyright (c) 2018 The WebM project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ */
+
+#include <arm_neon.h>
+#include <assert.h>
+
+#include "./vp9_rtcd.h"
+#include "./vpx_config.h"
+#include "vp9/common/vp9_common.h"
+#include "vp9/common/arm/neon/vp9_iht_neon.h"
+#include "vpx_dsp/arm/highbd_idct_neon.h"
+#include "vpx_dsp/arm/idct_neon.h"
+#include "vpx_dsp/arm/mem_neon.h"
+#include "vpx_dsp/txfm_common.h"
+
+static INLINE void highbd_iadst4(int32x4_t *const io) {
+ const int32_t sinpis[4] = { sinpi_1_9, sinpi_2_9, sinpi_3_9, sinpi_4_9 };
+ const int32x4_t sinpi = vld1q_s32(sinpis);
+ int64x2x2_t s[7], t[4];
+ int32x4_t s7;
+
+ s[0].val[0] = vmull_lane_s32(vget_low_s32(io[0]), vget_low_s32(sinpi), 0);
+ s[0].val[1] = vmull_lane_s32(vget_high_s32(io[0]), vget_low_s32(sinpi), 0);
+ s[1].val[0] = vmull_lane_s32(vget_low_s32(io[0]), vget_low_s32(sinpi), 1);
+ s[1].val[1] = vmull_lane_s32(vget_high_s32(io[0]), vget_low_s32(sinpi), 1);
+ s[2].val[0] = vmull_lane_s32(vget_low_s32(io[1]), vget_high_s32(sinpi), 0);
+ s[2].val[1] = vmull_lane_s32(vget_high_s32(io[1]), vget_high_s32(sinpi), 0);
+ s[3].val[0] = vmull_lane_s32(vget_low_s32(io[2]), vget_high_s32(sinpi), 1);
+ s[3].val[1] = vmull_lane_s32(vget_high_s32(io[2]), vget_high_s32(sinpi), 1);
+ s[4].val[0] = vmull_lane_s32(vget_low_s32(io[2]), vget_low_s32(sinpi), 0);
+ s[4].val[1] = vmull_lane_s32(vget_high_s32(io[2]), vget_low_s32(sinpi), 0);
+ s[5].val[0] = vmull_lane_s32(vget_low_s32(io[3]), vget_low_s32(sinpi), 1);
+ s[5].val[1] = vmull_lane_s32(vget_high_s32(io[3]), vget_low_s32(sinpi), 1);
+ s[6].val[0] = vmull_lane_s32(vget_low_s32(io[3]), vget_high_s32(sinpi), 1);
+ s[6].val[1] = vmull_lane_s32(vget_high_s32(io[3]), vget_high_s32(sinpi), 1);
+ s7 = vsubq_s32(io[0], io[2]);
+ s7 = vaddq_s32(s7, io[3]);
+
+ s[0].val[0] = vaddq_s64(s[0].val[0], s[3].val[0]);
+ s[0].val[1] = vaddq_s64(s[0].val[1], s[3].val[1]);
+ s[0].val[0] = vaddq_s64(s[0].val[0], s[5].val[0]);
+ s[0].val[1] = vaddq_s64(s[0].val[1], s[5].val[1]);
+ s[1].val[0] = vsubq_s64(s[1].val[0], s[4].val[0]);
+ s[1].val[1] = vsubq_s64(s[1].val[1], s[4].val[1]);
+ s[1].val[0] = vsubq_s64(s[1].val[0], s[6].val[0]);
+ s[1].val[1] = vsubq_s64(s[1].val[1], s[6].val[1]);
+ s[3] = s[2];
+ s[2].val[0] = vmull_lane_s32(vget_low_s32(s7), vget_high_s32(sinpi), 0);
+ s[2].val[1] = vmull_lane_s32(vget_high_s32(s7), vget_high_s32(sinpi), 0);
+
+ t[0].val[0] = vaddq_s64(s[0].val[0], s[3].val[0]);
+ t[0].val[1] = vaddq_s64(s[0].val[1], s[3].val[1]);
+ t[1].val[0] = vaddq_s64(s[1].val[0], s[3].val[0]);
+ t[1].val[1] = vaddq_s64(s[1].val[1], s[3].val[1]);
+ t[2] = s[2];
+ t[3].val[0] = vaddq_s64(s[0].val[0], s[1].val[0]);
+ t[3].val[1] = vaddq_s64(s[0].val[1], s[1].val[1]);
+ t[3].val[0] = vsubq_s64(t[3].val[0], s[3].val[0]);
+ t[3].val[1] = vsubq_s64(t[3].val[1], s[3].val[1]);
+ io[0] = vcombine_s32(vrshrn_n_s64(t[0].val[0], DCT_CONST_BITS),
+ vrshrn_n_s64(t[0].val[1], DCT_CONST_BITS));
+ io[1] = vcombine_s32(vrshrn_n_s64(t[1].val[0], DCT_CONST_BITS),
+ vrshrn_n_s64(t[1].val[1], DCT_CONST_BITS));
+ io[2] = vcombine_s32(vrshrn_n_s64(t[2].val[0], DCT_CONST_BITS),
+ vrshrn_n_s64(t[2].val[1], DCT_CONST_BITS));
+ io[3] = vcombine_s32(vrshrn_n_s64(t[3].val[0], DCT_CONST_BITS),
+ vrshrn_n_s64(t[3].val[1], DCT_CONST_BITS));
+}
+
+void vp9_highbd_iht4x4_16_add_neon(const tran_low_t *input, uint16_t *dest,
+ int stride, int tx_type, int bd) {
+ const int16x8_t max = vdupq_n_s16((1 << bd) - 1);
+ int16x8_t a[2];
+ int32x4_t c[4];
+
+ c[0] = vld1q_s32(input);
+ c[1] = vld1q_s32(input + 4);
+ c[2] = vld1q_s32(input + 8);
+ c[3] = vld1q_s32(input + 12);
+
+ if (bd == 8) {
+ a[0] = vcombine_s16(vmovn_s32(c[0]), vmovn_s32(c[1]));
+ a[1] = vcombine_s16(vmovn_s32(c[2]), vmovn_s32(c[3]));
+ transpose_s16_4x4q(&a[0], &a[1]);
+
+ switch (tx_type) {
+ case DCT_DCT:
+ idct4x4_16_kernel_bd8(a);
+ a[1] = vcombine_s16(vget_high_s16(a[1]), vget_low_s16(a[1]));
+ transpose_s16_4x4q(&a[0], &a[1]);
+ idct4x4_16_kernel_bd8(a);
+ a[1] = vcombine_s16(vget_high_s16(a[1]), vget_low_s16(a[1]));
+ break;
+
+ case ADST_DCT:
+ idct4x4_16_kernel_bd8(a);
+ a[1] = vcombine_s16(vget_high_s16(a[1]), vget_low_s16(a[1]));
+ transpose_s16_4x4q(&a[0], &a[1]);
+ iadst4(a);
+ break;
+
+ case DCT_ADST:
+ iadst4(a);
+ transpose_s16_4x4q(&a[0], &a[1]);
+ idct4x4_16_kernel_bd8(a);
+ a[1] = vcombine_s16(vget_high_s16(a[1]), vget_low_s16(a[1]));
+ break;
+
+ default:
+ assert(tx_type == ADST_ADST);
+ iadst4(a);
+ transpose_s16_4x4q(&a[0], &a[1]);
+ iadst4(a);
+ break;
+ }
+ a[0] = vrshrq_n_s16(a[0], 4);
+ a[1] = vrshrq_n_s16(a[1], 4);
+ } else {
+ switch (tx_type) {
+ case DCT_DCT: {
+ const int32x4_t cospis = vld1q_s32(kCospi32);
+
+ if (bd == 10) {
+ idct4x4_16_kernel_bd10(cospis, c);
+ idct4x4_16_kernel_bd10(cospis, c);
+ } else {
+ idct4x4_16_kernel_bd12(cospis, c);
+ idct4x4_16_kernel_bd12(cospis, c);
+ }
+ break;
+ }
+
+ case ADST_DCT: {
+ const int32x4_t cospis = vld1q_s32(kCospi32);
+
+ if (bd == 10) {
+ idct4x4_16_kernel_bd10(cospis, c);
+ } else {
+ idct4x4_16_kernel_bd12(cospis, c);
+ }
+ transpose_s32_4x4(&c[0], &c[1], &c[2], &c[3]);
+ highbd_iadst4(c);
+ break;
+ }
+
+ case DCT_ADST: {
+ const int32x4_t cospis = vld1q_s32(kCospi32);
+
+ transpose_s32_4x4(&c[0], &c[1], &c[2], &c[3]);
+ highbd_iadst4(c);
+ if (bd == 10) {
+ idct4x4_16_kernel_bd10(cospis, c);
+ } else {
+ idct4x4_16_kernel_bd12(cospis, c);
+ }
+ break;
+ }
+
+ default: {
+ assert(tx_type == ADST_ADST);
+ transpose_s32_4x4(&c[0], &c[1], &c[2], &c[3]);
+ highbd_iadst4(c);
+ transpose_s32_4x4(&c[0], &c[1], &c[2], &c[3]);
+ highbd_iadst4(c);
+ break;
+ }
+ }
+ a[0] = vcombine_s16(vqrshrn_n_s32(c[0], 4), vqrshrn_n_s32(c[1], 4));
+ a[1] = vcombine_s16(vqrshrn_n_s32(c[2], 4), vqrshrn_n_s32(c[3], 4));
+ }
+
+ highbd_idct4x4_1_add_kernel1(&dest, stride, a[0], max);
+ highbd_idct4x4_1_add_kernel1(&dest, stride, a[1], max);
+}
diff --git a/media/libvpx/libvpx/vp9/common/arm/neon/vp9_highbd_iht8x8_add_neon.c b/media/libvpx/libvpx/vp9/common/arm/neon/vp9_highbd_iht8x8_add_neon.c
new file mode 100644
index 0000000000..2232c6841c
--- /dev/null
+++ b/media/libvpx/libvpx/vp9/common/arm/neon/vp9_highbd_iht8x8_add_neon.c
@@ -0,0 +1,345 @@
+/*
+ * Copyright (c) 2018 The WebM project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ */
+
+#include <arm_neon.h>
+
+#include "./vpx_dsp_rtcd.h"
+#include "vp9/common/vp9_enums.h"
+#include "vp9/common/arm/neon/vp9_iht_neon.h"
+#include "vpx_dsp/arm/highbd_idct_neon.h"
+#include "vpx_dsp/arm/idct_neon.h"
+#include "vpx_dsp/arm/transpose_neon.h"
+#include "vpx_dsp/inv_txfm.h"
+
+static INLINE void highbd_iadst_half_butterfly_neon(int32x4_t *const x,
+ const int32x2_t c) {
+ const int32x4_t sum = vaddq_s32(x[0], x[1]);
+ const int32x4_t sub = vsubq_s32(x[0], x[1]);
+ const int64x2_t t0_lo = vmull_lane_s32(vget_low_s32(sum), c, 0);
+ const int64x2_t t1_lo = vmull_lane_s32(vget_low_s32(sub), c, 0);
+ const int64x2_t t0_hi = vmull_lane_s32(vget_high_s32(sum), c, 0);
+ const int64x2_t t1_hi = vmull_lane_s32(vget_high_s32(sub), c, 0);
+ const int32x2_t out0_lo = vrshrn_n_s64(t0_lo, DCT_CONST_BITS);
+ const int32x2_t out1_lo = vrshrn_n_s64(t1_lo, DCT_CONST_BITS);
+ const int32x2_t out0_hi = vrshrn_n_s64(t0_hi, DCT_CONST_BITS);
+ const int32x2_t out1_hi = vrshrn_n_s64(t1_hi, DCT_CONST_BITS);
+
+ x[0] = vcombine_s32(out0_lo, out0_hi);
+ x[1] = vcombine_s32(out1_lo, out1_hi);
+}
+
+static INLINE void highbd_iadst_butterfly_lane_0_1_neon(const int32x4_t in0,
+ const int32x4_t in1,
+ const int32x2_t c,
+ int64x2_t *const s0,
+ int64x2_t *const s1) {
+ const int64x2_t t0_lo = vmull_lane_s32(vget_low_s32(in0), c, 0);
+ const int64x2_t t1_lo = vmull_lane_s32(vget_low_s32(in0), c, 1);
+ const int64x2_t t0_hi = vmull_lane_s32(vget_high_s32(in0), c, 0);
+ const int64x2_t t1_hi = vmull_lane_s32(vget_high_s32(in0), c, 1);
+
+ s0[0] = vmlal_lane_s32(t0_lo, vget_low_s32(in1), c, 1);
+ s1[0] = vmlsl_lane_s32(t1_lo, vget_low_s32(in1), c, 0);
+ s0[1] = vmlal_lane_s32(t0_hi, vget_high_s32(in1), c, 1);
+ s1[1] = vmlsl_lane_s32(t1_hi, vget_high_s32(in1), c, 0);
+}
+
+static INLINE void highbd_iadst_butterfly_lane_1_0_neon(const int32x4_t in0,
+ const int32x4_t in1,
+ const int32x2_t c,
+ int64x2_t *const s0,
+ int64x2_t *const s1) {
+ const int64x2_t t0_lo = vmull_lane_s32(vget_low_s32(in0), c, 1);
+ const int64x2_t t1_lo = vmull_lane_s32(vget_low_s32(in0), c, 0);
+ const int64x2_t t0_hi = vmull_lane_s32(vget_high_s32(in0), c, 1);
+ const int64x2_t t1_hi = vmull_lane_s32(vget_high_s32(in0), c, 0);
+
+ s0[0] = vmlal_lane_s32(t0_lo, vget_low_s32(in1), c, 0);
+ s1[0] = vmlsl_lane_s32(t1_lo, vget_low_s32(in1), c, 1);
+ s0[1] = vmlal_lane_s32(t0_hi, vget_high_s32(in1), c, 0);
+ s1[1] = vmlsl_lane_s32(t1_hi, vget_high_s32(in1), c, 1);
+}
+
+static INLINE int32x4_t highbd_add_dct_const_round_shift_low_8(
+ const int64x2_t *const in0, const int64x2_t *const in1) {
+ const int64x2_t sum_lo = vaddq_s64(in0[0], in1[0]);
+ const int64x2_t sum_hi = vaddq_s64(in0[1], in1[1]);
+ const int32x2_t out_lo = vrshrn_n_s64(sum_lo, DCT_CONST_BITS);
+ const int32x2_t out_hi = vrshrn_n_s64(sum_hi, DCT_CONST_BITS);
+ return vcombine_s32(out_lo, out_hi);
+}
+
+static INLINE int32x4_t highbd_sub_dct_const_round_shift_low_8(
+ const int64x2_t *const in0, const int64x2_t *const in1) {
+ const int64x2_t sub_lo = vsubq_s64(in0[0], in1[0]);
+ const int64x2_t sub_hi = vsubq_s64(in0[1], in1[1]);
+ const int32x2_t out_lo = vrshrn_n_s64(sub_lo, DCT_CONST_BITS);
+ const int32x2_t out_hi = vrshrn_n_s64(sub_hi, DCT_CONST_BITS);
+ return vcombine_s32(out_lo, out_hi);
+}
+
+static INLINE void highbd_iadst8(int32x4_t *const io0, int32x4_t *const io1,
+ int32x4_t *const io2, int32x4_t *const io3,
+ int32x4_t *const io4, int32x4_t *const io5,
+ int32x4_t *const io6, int32x4_t *const io7) {
+ const int32x4_t c0 =
+ create_s32x4_neon(cospi_2_64, cospi_30_64, cospi_10_64, cospi_22_64);
+ const int32x4_t c1 =
+ create_s32x4_neon(cospi_18_64, cospi_14_64, cospi_26_64, cospi_6_64);
+ const int32x4_t c2 =
+ create_s32x4_neon(cospi_16_64, 0, cospi_8_64, cospi_24_64);
+ int32x4_t x[8], t[4];
+ int64x2_t s[8][2];
+
+ x[0] = *io7;
+ x[1] = *io0;
+ x[2] = *io5;
+ x[3] = *io2;
+ x[4] = *io3;
+ x[5] = *io4;
+ x[6] = *io1;
+ x[7] = *io6;
+
+ // stage 1
+ highbd_iadst_butterfly_lane_0_1_neon(x[0], x[1], vget_low_s32(c0), s[0],
+ s[1]);
+ highbd_iadst_butterfly_lane_0_1_neon(x[2], x[3], vget_high_s32(c0), s[2],
+ s[3]);
+ highbd_iadst_butterfly_lane_0_1_neon(x[4], x[5], vget_low_s32(c1), s[4],
+ s[5]);
+ highbd_iadst_butterfly_lane_0_1_neon(x[6], x[7], vget_high_s32(c1), s[6],
+ s[7]);
+
+ x[0] = highbd_add_dct_const_round_shift_low_8(s[0], s[4]);
+ x[1] = highbd_add_dct_const_round_shift_low_8(s[1], s[5]);
+ x[2] = highbd_add_dct_const_round_shift_low_8(s[2], s[6]);
+ x[3] = highbd_add_dct_const_round_shift_low_8(s[3], s[7]);
+ x[4] = highbd_sub_dct_const_round_shift_low_8(s[0], s[4]);
+ x[5] = highbd_sub_dct_const_round_shift_low_8(s[1], s[5]);
+ x[6] = highbd_sub_dct_const_round_shift_low_8(s[2], s[6]);
+ x[7] = highbd_sub_dct_const_round_shift_low_8(s[3], s[7]);
+
+ // stage 2
+ t[0] = x[0];
+ t[1] = x[1];
+ t[2] = x[2];
+ t[3] = x[3];
+ highbd_iadst_butterfly_lane_0_1_neon(x[4], x[5], vget_high_s32(c2), s[4],
+ s[5]);
+ highbd_iadst_butterfly_lane_1_0_neon(x[7], x[6], vget_high_s32(c2), s[7],
+ s[6]);
+
+ x[0] = vaddq_s32(t[0], t[2]);
+ x[1] = vaddq_s32(t[1], t[3]);
+ x[2] = vsubq_s32(t[0], t[2]);
+ x[3] = vsubq_s32(t[1], t[3]);
+ x[4] = highbd_add_dct_const_round_shift_low_8(s[4], s[6]);
+ x[5] = highbd_add_dct_const_round_shift_low_8(s[5], s[7]);
+ x[6] = highbd_sub_dct_const_round_shift_low_8(s[4], s[6]);
+ x[7] = highbd_sub_dct_const_round_shift_low_8(s[5], s[7]);
+
+ // stage 3
+ highbd_iadst_half_butterfly_neon(x + 2, vget_low_s32(c2));
+ highbd_iadst_half_butterfly_neon(x + 6, vget_low_s32(c2));
+
+ *io0 = x[0];
+ *io1 = vnegq_s32(x[4]);
+ *io2 = x[6];
+ *io3 = vnegq_s32(x[2]);
+ *io4 = x[3];
+ *io5 = vnegq_s32(x[7]);
+ *io6 = x[5];
+ *io7 = vnegq_s32(x[1]);
+}
+
+void vp9_highbd_iht8x8_64_add_neon(const tran_low_t *input, uint16_t *dest,
+ int stride, int tx_type, int bd) {
+ int32x4_t a[16];
+ int16x8_t c[8];
+
+ a[0] = vld1q_s32(input);
+ a[1] = vld1q_s32(input + 4);
+ a[2] = vld1q_s32(input + 8);
+ a[3] = vld1q_s32(input + 12);
+ a[4] = vld1q_s32(input + 16);
+ a[5] = vld1q_s32(input + 20);
+ a[6] = vld1q_s32(input + 24);
+ a[7] = vld1q_s32(input + 28);
+ a[8] = vld1q_s32(input + 32);
+ a[9] = vld1q_s32(input + 36);
+ a[10] = vld1q_s32(input + 40);
+ a[11] = vld1q_s32(input + 44);
+ a[12] = vld1q_s32(input + 48);
+ a[13] = vld1q_s32(input + 52);
+ a[14] = vld1q_s32(input + 56);
+ a[15] = vld1q_s32(input + 60);
+
+ if (bd == 8) {
+ c[0] = vcombine_s16(vmovn_s32(a[0]), vmovn_s32(a[1]));
+ c[1] = vcombine_s16(vmovn_s32(a[2]), vmovn_s32(a[3]));
+ c[2] = vcombine_s16(vmovn_s32(a[4]), vmovn_s32(a[5]));
+ c[3] = vcombine_s16(vmovn_s32(a[6]), vmovn_s32(a[7]));
+ c[4] = vcombine_s16(vmovn_s32(a[8]), vmovn_s32(a[9]));
+ c[5] = vcombine_s16(vmovn_s32(a[10]), vmovn_s32(a[11]));
+ c[6] = vcombine_s16(vmovn_s32(a[12]), vmovn_s32(a[13]));
+ c[7] = vcombine_s16(vmovn_s32(a[14]), vmovn_s32(a[15]));
+
+ switch (tx_type) {
+ case DCT_DCT: {
+ const int16x8_t cospis = vld1q_s16(kCospi);
+ const int16x4_t cospis0 = vget_low_s16(cospis); // cospi 0, 8, 16, 24
+ const int16x4_t cospis1 = vget_high_s16(cospis); // cospi 4, 12, 20, 28
+
+ idct8x8_64_1d_bd8(cospis0, cospis1, c);
+ idct8x8_64_1d_bd8(cospis0, cospis1, c);
+ break;
+ }
+
+ case ADST_DCT: {
+ const int16x8_t cospis = vld1q_s16(kCospi);
+ const int16x4_t cospis0 = vget_low_s16(cospis); // cospi 0, 8, 16, 24
+ const int16x4_t cospis1 = vget_high_s16(cospis); // cospi 4, 12, 20, 28
+
+ idct8x8_64_1d_bd8(cospis0, cospis1, c);
+ transpose_s16_8x8(&c[0], &c[1], &c[2], &c[3], &c[4], &c[5], &c[6],
+ &c[7]);
+ iadst8(c);
+ break;
+ }
+
+ case DCT_ADST: {
+ const int16x8_t cospis = vld1q_s16(kCospi);
+ const int16x4_t cospis0 = vget_low_s16(cospis); // cospi 0, 8, 16, 24
+ const int16x4_t cospis1 = vget_high_s16(cospis); // cospi 4, 12, 20, 28
+
+ transpose_s16_8x8(&c[0], &c[1], &c[2], &c[3], &c[4], &c[5], &c[6],
+ &c[7]);
+ iadst8(c);
+ idct8x8_64_1d_bd8(cospis0, cospis1, c);
+ break;
+ }
+
+ default: {
+ transpose_s16_8x8(&c[0], &c[1], &c[2], &c[3], &c[4], &c[5], &c[6],
+ &c[7]);
+ iadst8(c);
+ transpose_s16_8x8(&c[0], &c[1], &c[2], &c[3], &c[4], &c[5], &c[6],
+ &c[7]);
+ iadst8(c);
+ break;
+ }
+ }
+
+ c[0] = vrshrq_n_s16(c[0], 5);
+ c[1] = vrshrq_n_s16(c[1], 5);
+ c[2] = vrshrq_n_s16(c[2], 5);
+ c[3] = vrshrq_n_s16(c[3], 5);
+ c[4] = vrshrq_n_s16(c[4], 5);
+ c[5] = vrshrq_n_s16(c[5], 5);
+ c[6] = vrshrq_n_s16(c[6], 5);
+ c[7] = vrshrq_n_s16(c[7], 5);
+ } else {
+ switch (tx_type) {
+ case DCT_DCT: {
+ const int32x4_t cospis0 = vld1q_s32(kCospi32); // cospi 0, 8, 16, 24
+ const int32x4_t cospis1 =
+ vld1q_s32(kCospi32 + 4); // cospi 4, 12, 20, 28
+
+ if (bd == 10) {
+ idct8x8_64_half1d_bd10(cospis0, cospis1, &a[0], &a[1], &a[2], &a[3],
+ &a[4], &a[5], &a[6], &a[7]);
+ idct8x8_64_half1d_bd10(cospis0, cospis1, &a[8], &a[9], &a[10], &a[11],
+ &a[12], &a[13], &a[14], &a[15]);
+ idct8x8_64_half1d_bd10(cospis0, cospis1, &a[0], &a[8], &a[1], &a[9],
+ &a[2], &a[10], &a[3], &a[11]);
+ idct8x8_64_half1d_bd10(cospis0, cospis1, &a[4], &a[12], &a[5], &a[13],
+ &a[6], &a[14], &a[7], &a[15]);
+ } else {
+ idct8x8_64_half1d_bd12(cospis0, cospis1, &a[0], &a[1], &a[2], &a[3],
+ &a[4], &a[5], &a[6], &a[7]);
+ idct8x8_64_half1d_bd12(cospis0, cospis1, &a[8], &a[9], &a[10], &a[11],
+ &a[12], &a[13], &a[14], &a[15]);
+ idct8x8_64_half1d_bd12(cospis0, cospis1, &a[0], &a[8], &a[1], &a[9],
+ &a[2], &a[10], &a[3], &a[11]);
+ idct8x8_64_half1d_bd12(cospis0, cospis1, &a[4], &a[12], &a[5], &a[13],
+ &a[6], &a[14], &a[7], &a[15]);
+ }
+ break;
+ }
+
+ case ADST_DCT: {
+ const int32x4_t cospis0 = vld1q_s32(kCospi32); // cospi 0, 8, 16, 24
+ const int32x4_t cospis1 =
+ vld1q_s32(kCospi32 + 4); // cospi 4, 12, 20, 28
+
+ idct8x8_64_half1d_bd12(cospis0, cospis1, &a[0], &a[1], &a[2], &a[3],
+ &a[4], &a[5], &a[6], &a[7]);
+ idct8x8_64_half1d_bd12(cospis0, cospis1, &a[8], &a[9], &a[10], &a[11],
+ &a[12], &a[13], &a[14], &a[15]);
+ transpose_s32_8x4(&a[0], &a[8], &a[1], &a[9], &a[2], &a[10], &a[3],
+ &a[11]);
+ highbd_iadst8(&a[0], &a[8], &a[1], &a[9], &a[2], &a[10], &a[3], &a[11]);
+ transpose_s32_8x4(&a[4], &a[12], &a[5], &a[13], &a[6], &a[14], &a[7],
+ &a[15]);
+ highbd_iadst8(&a[4], &a[12], &a[5], &a[13], &a[6], &a[14], &a[7],
+ &a[15]);
+ break;
+ }
+
+ case DCT_ADST: {
+ const int32x4_t cospis0 = vld1q_s32(kCospi32); // cospi 0, 8, 16, 24
+ const int32x4_t cospis1 =
+ vld1q_s32(kCospi32 + 4); // cospi 4, 12, 20, 28
+
+ transpose_s32_8x4(&a[0], &a[1], &a[2], &a[3], &a[4], &a[5], &a[6],
+ &a[7]);
+ highbd_iadst8(&a[0], &a[1], &a[2], &a[3], &a[4], &a[5], &a[6], &a[7]);
+ transpose_s32_8x4(&a[8], &a[9], &a[10], &a[11], &a[12], &a[13], &a[14],
+ &a[15]);
+ highbd_iadst8(&a[8], &a[9], &a[10], &a[11], &a[12], &a[13], &a[14],
+ &a[15]);
+ idct8x8_64_half1d_bd12(cospis0, cospis1, &a[0], &a[8], &a[1], &a[9],
+ &a[2], &a[10], &a[3], &a[11]);
+ idct8x8_64_half1d_bd12(cospis0, cospis1, &a[4], &a[12], &a[5], &a[13],
+ &a[6], &a[14], &a[7], &a[15]);
+ break;
+ }
+
+ default: {
+ assert(tx_type == ADST_ADST);
+ transpose_s32_8x4(&a[0], &a[1], &a[2], &a[3], &a[4], &a[5], &a[6],
+ &a[7]);
+ highbd_iadst8(&a[0], &a[1], &a[2], &a[3], &a[4], &a[5], &a[6], &a[7]);
+ transpose_s32_8x4(&a[8], &a[9], &a[10], &a[11], &a[12], &a[13], &a[14],
+ &a[15]);
+ highbd_iadst8(&a[8], &a[9], &a[10], &a[11], &a[12], &a[13], &a[14],
+ &a[15]);
+ transpose_s32_8x4(&a[0], &a[8], &a[1], &a[9], &a[2], &a[10], &a[3],
+ &a[11]);
+ highbd_iadst8(&a[0], &a[8], &a[1], &a[9], &a[2], &a[10], &a[3], &a[11]);
+ transpose_s32_8x4(&a[4], &a[12], &a[5], &a[13], &a[6], &a[14], &a[7],
+ &a[15]);
+ highbd_iadst8(&a[4], &a[12], &a[5], &a[13], &a[6], &a[14], &a[7],
+ &a[15]);
+ break;
+ }
+ }
+
+ c[0] = vcombine_s16(vrshrn_n_s32(a[0], 5), vrshrn_n_s32(a[4], 5));
+ c[1] = vcombine_s16(vrshrn_n_s32(a[8], 5), vrshrn_n_s32(a[12], 5));
+ c[2] = vcombine_s16(vrshrn_n_s32(a[1], 5), vrshrn_n_s32(a[5], 5));
+ c[3] = vcombine_s16(vrshrn_n_s32(a[9], 5), vrshrn_n_s32(a[13], 5));
+ c[4] = vcombine_s16(vrshrn_n_s32(a[2], 5), vrshrn_n_s32(a[6], 5));
+ c[5] = vcombine_s16(vrshrn_n_s32(a[10], 5), vrshrn_n_s32(a[14], 5));
+ c[6] = vcombine_s16(vrshrn_n_s32(a[3], 5), vrshrn_n_s32(a[7], 5));
+ c[7] = vcombine_s16(vrshrn_n_s32(a[11], 5), vrshrn_n_s32(a[15], 5));
+ }
+ highbd_add8x8(c, dest, stride, bd);
+}
diff --git a/media/libvpx/libvpx/vp9/common/arm/neon/vp9_iht16x16_add_neon.c b/media/libvpx/libvpx/vp9/common/arm/neon/vp9_iht16x16_add_neon.c
new file mode 100644
index 0000000000..db72ff1161
--- /dev/null
+++ b/media/libvpx/libvpx/vp9/common/arm/neon/vp9_iht16x16_add_neon.c
@@ -0,0 +1,279 @@
+/*
+ * Copyright (c) 2018 The WebM project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ */
+
+#include <arm_neon.h>
+#include <assert.h>
+
+#include "./vp9_rtcd.h"
+#include "./vpx_config.h"
+#include "vp9/common/vp9_common.h"
+#include "vp9/common/arm/neon/vp9_iht_neon.h"
+#include "vpx_dsp/arm/idct_neon.h"
+#include "vpx_dsp/arm/mem_neon.h"
+#include "vpx_dsp/arm/transpose_neon.h"
+
+void vpx_iadst16x16_256_add_half1d(const void *const input, int16_t *output,
+ void *const dest, const int stride,
+ const int highbd_flag) {
+ int16x8_t in[16], out[16];
+ const int16x4_t c_1_31_5_27 =
+ create_s16x4_neon(cospi_1_64, cospi_31_64, cospi_5_64, cospi_27_64);
+ const int16x4_t c_9_23_13_19 =
+ create_s16x4_neon(cospi_9_64, cospi_23_64, cospi_13_64, cospi_19_64);
+ const int16x4_t c_17_15_21_11 =
+ create_s16x4_neon(cospi_17_64, cospi_15_64, cospi_21_64, cospi_11_64);
+ const int16x4_t c_25_7_29_3 =
+ create_s16x4_neon(cospi_25_64, cospi_7_64, cospi_29_64, cospi_3_64);
+ const int16x4_t c_4_28_20_12 =
+ create_s16x4_neon(cospi_4_64, cospi_28_64, cospi_20_64, cospi_12_64);
+ const int16x4_t c_16_n16_8_24 =
+ create_s16x4_neon(cospi_16_64, -cospi_16_64, cospi_8_64, cospi_24_64);
+ int16x8_t x[16], t[12];
+ int32x4_t s0[2], s1[2], s2[2], s3[2], s4[2], s5[2], s6[2], s7[2];
+ int32x4_t s8[2], s9[2], s10[2], s11[2], s12[2], s13[2], s14[2], s15[2];
+
+ // Load input (16x8)
+ if (output) {
+ const tran_low_t *inputT = (const tran_low_t *)input;
+ in[0] = load_tran_low_to_s16q(inputT);
+ inputT += 8;
+ in[8] = load_tran_low_to_s16q(inputT);
+ inputT += 8;
+ in[1] = load_tran_low_to_s16q(inputT);
+ inputT += 8;
+ in[9] = load_tran_low_to_s16q(inputT);
+ inputT += 8;
+ in[2] = load_tran_low_to_s16q(inputT);
+ inputT += 8;
+ in[10] = load_tran_low_to_s16q(inputT);
+ inputT += 8;
+ in[3] = load_tran_low_to_s16q(inputT);
+ inputT += 8;
+ in[11] = load_tran_low_to_s16q(inputT);
+ inputT += 8;
+ in[4] = load_tran_low_to_s16q(inputT);
+ inputT += 8;
+ in[12] = load_tran_low_to_s16q(inputT);
+ inputT += 8;
+ in[5] = load_tran_low_to_s16q(inputT);
+ inputT += 8;
+ in[13] = load_tran_low_to_s16q(inputT);
+ inputT += 8;
+ in[6] = load_tran_low_to_s16q(inputT);
+ inputT += 8;
+ in[14] = load_tran_low_to_s16q(inputT);
+ inputT += 8;
+ in[7] = load_tran_low_to_s16q(inputT);
+ inputT += 8;
+ in[15] = load_tran_low_to_s16q(inputT);
+ } else {
+ const int16_t *inputT = (const int16_t *)input;
+ in[0] = vld1q_s16(inputT);
+ inputT += 8;
+ in[8] = vld1q_s16(inputT);
+ inputT += 8;
+ in[1] = vld1q_s16(inputT);
+ inputT += 8;
+ in[9] = vld1q_s16(inputT);
+ inputT += 8;
+ in[2] = vld1q_s16(inputT);
+ inputT += 8;
+ in[10] = vld1q_s16(inputT);
+ inputT += 8;
+ in[3] = vld1q_s16(inputT);
+ inputT += 8;
+ in[11] = vld1q_s16(inputT);
+ inputT += 8;
+ in[4] = vld1q_s16(inputT);
+ inputT += 8;
+ in[12] = vld1q_s16(inputT);
+ inputT += 8;
+ in[5] = vld1q_s16(inputT);
+ inputT += 8;
+ in[13] = vld1q_s16(inputT);
+ inputT += 8;
+ in[6] = vld1q_s16(inputT);
+ inputT += 8;
+ in[14] = vld1q_s16(inputT);
+ inputT += 8;
+ in[7] = vld1q_s16(inputT);
+ inputT += 8;
+ in[15] = vld1q_s16(inputT);
+ }
+
+ // Transpose
+ transpose_s16_8x8(&in[0], &in[1], &in[2], &in[3], &in[4], &in[5], &in[6],
+ &in[7]);
+ transpose_s16_8x8(&in[8], &in[9], &in[10], &in[11], &in[12], &in[13], &in[14],
+ &in[15]);
+
+ x[0] = in[15];
+ x[1] = in[0];
+ x[2] = in[13];
+ x[3] = in[2];
+ x[4] = in[11];
+ x[5] = in[4];
+ x[6] = in[9];
+ x[7] = in[6];
+ x[8] = in[7];
+ x[9] = in[8];
+ x[10] = in[5];
+ x[11] = in[10];
+ x[12] = in[3];
+ x[13] = in[12];
+ x[14] = in[1];
+ x[15] = in[14];
+
+ // stage 1
+ iadst_butterfly_lane_0_1_neon(x[0], x[1], c_1_31_5_27, s0, s1);
+ iadst_butterfly_lane_2_3_neon(x[2], x[3], c_1_31_5_27, s2, s3);
+ iadst_butterfly_lane_0_1_neon(x[4], x[5], c_9_23_13_19, s4, s5);
+ iadst_butterfly_lane_2_3_neon(x[6], x[7], c_9_23_13_19, s6, s7);
+ iadst_butterfly_lane_0_1_neon(x[8], x[9], c_17_15_21_11, s8, s9);
+ iadst_butterfly_lane_2_3_neon(x[10], x[11], c_17_15_21_11, s10, s11);
+ iadst_butterfly_lane_0_1_neon(x[12], x[13], c_25_7_29_3, s12, s13);
+ iadst_butterfly_lane_2_3_neon(x[14], x[15], c_25_7_29_3, s14, s15);
+
+ x[0] = add_dct_const_round_shift_low_8(s0, s8);
+ x[1] = add_dct_const_round_shift_low_8(s1, s9);
+ x[2] = add_dct_const_round_shift_low_8(s2, s10);
+ x[3] = add_dct_const_round_shift_low_8(s3, s11);
+ x[4] = add_dct_const_round_shift_low_8(s4, s12);
+ x[5] = add_dct_const_round_shift_low_8(s5, s13);
+ x[6] = add_dct_const_round_shift_low_8(s6, s14);
+ x[7] = add_dct_const_round_shift_low_8(s7, s15);
+ x[8] = sub_dct_const_round_shift_low_8(s0, s8);
+ x[9] = sub_dct_const_round_shift_low_8(s1, s9);
+ x[10] = sub_dct_const_round_shift_low_8(s2, s10);
+ x[11] = sub_dct_const_round_shift_low_8(s3, s11);
+ x[12] = sub_dct_const_round_shift_low_8(s4, s12);
+ x[13] = sub_dct_const_round_shift_low_8(s5, s13);
+ x[14] = sub_dct_const_round_shift_low_8(s6, s14);
+ x[15] = sub_dct_const_round_shift_low_8(s7, s15);
+
+ // stage 2
+ t[0] = x[0];
+ t[1] = x[1];
+ t[2] = x[2];
+ t[3] = x[3];
+ t[4] = x[4];
+ t[5] = x[5];
+ t[6] = x[6];
+ t[7] = x[7];
+ iadst_butterfly_lane_0_1_neon(x[8], x[9], c_4_28_20_12, s8, s9);
+ iadst_butterfly_lane_2_3_neon(x[10], x[11], c_4_28_20_12, s10, s11);
+ iadst_butterfly_lane_1_0_neon(x[13], x[12], c_4_28_20_12, s13, s12);
+ iadst_butterfly_lane_3_2_neon(x[15], x[14], c_4_28_20_12, s15, s14);
+
+ x[0] = vaddq_s16(t[0], t[4]);
+ x[1] = vaddq_s16(t[1], t[5]);
+ x[2] = vaddq_s16(t[2], t[6]);
+ x[3] = vaddq_s16(t[3], t[7]);
+ x[4] = vsubq_s16(t[0], t[4]);
+ x[5] = vsubq_s16(t[1], t[5]);
+ x[6] = vsubq_s16(t[2], t[6]);
+ x[7] = vsubq_s16(t[3], t[7]);
+ x[8] = add_dct_const_round_shift_low_8(s8, s12);
+ x[9] = add_dct_const_round_shift_low_8(s9, s13);
+ x[10] = add_dct_const_round_shift_low_8(s10, s14);
+ x[11] = add_dct_const_round_shift_low_8(s11, s15);
+ x[12] = sub_dct_const_round_shift_low_8(s8, s12);
+ x[13] = sub_dct_const_round_shift_low_8(s9, s13);
+ x[14] = sub_dct_const_round_shift_low_8(s10, s14);
+ x[15] = sub_dct_const_round_shift_low_8(s11, s15);
+
+ // stage 3
+ t[0] = x[0];
+ t[1] = x[1];
+ t[2] = x[2];
+ t[3] = x[3];
+ iadst_butterfly_lane_2_3_neon(x[4], x[5], c_16_n16_8_24, s4, s5);
+ iadst_butterfly_lane_3_2_neon(x[7], x[6], c_16_n16_8_24, s7, s6);
+ t[8] = x[8];
+ t[9] = x[9];
+ t[10] = x[10];
+ t[11] = x[11];
+ iadst_butterfly_lane_2_3_neon(x[12], x[13], c_16_n16_8_24, s12, s13);
+ iadst_butterfly_lane_3_2_neon(x[15], x[14], c_16_n16_8_24, s15, s14);
+
+ x[0] = vaddq_s16(t[0], t[2]);
+ x[1] = vaddq_s16(t[1], t[3]);
+ x[2] = vsubq_s16(t[0], t[2]);
+ x[3] = vsubq_s16(t[1], t[3]);
+ x[4] = add_dct_const_round_shift_low_8(s4, s6);
+ x[5] = add_dct_const_round_shift_low_8(s5, s7);
+ x[6] = sub_dct_const_round_shift_low_8(s4, s6);
+ x[7] = sub_dct_const_round_shift_low_8(s5, s7);
+ x[8] = vaddq_s16(t[8], t[10]);
+ x[9] = vaddq_s16(t[9], t[11]);
+ x[10] = vsubq_s16(t[8], t[10]);
+ x[11] = vsubq_s16(t[9], t[11]);
+ x[12] = add_dct_const_round_shift_low_8(s12, s14);
+ x[13] = add_dct_const_round_shift_low_8(s13, s15);
+ x[14] = sub_dct_const_round_shift_low_8(s12, s14);
+ x[15] = sub_dct_const_round_shift_low_8(s13, s15);
+
+ // stage 4
+ iadst_half_butterfly_neg_neon(&x[3], &x[2], c_16_n16_8_24);
+ iadst_half_butterfly_pos_neon(&x[7], &x[6], c_16_n16_8_24);
+ iadst_half_butterfly_pos_neon(&x[11], &x[10], c_16_n16_8_24);
+ iadst_half_butterfly_neg_neon(&x[15], &x[14], c_16_n16_8_24);
+
+ out[0] = x[0];
+ out[1] = vnegq_s16(x[8]);
+ out[2] = x[12];
+ out[3] = vnegq_s16(x[4]);
+ out[4] = x[6];
+ out[5] = x[14];
+ out[6] = x[10];
+ out[7] = x[2];
+ out[8] = x[3];
+ out[9] = x[11];
+ out[10] = x[15];
+ out[11] = x[7];
+ out[12] = x[5];
+ out[13] = vnegq_s16(x[13]);
+ out[14] = x[9];
+ out[15] = vnegq_s16(x[1]);
+
+ if (output) {
+ idct16x16_store_pass1(out, output);
+ } else {
+ if (highbd_flag) {
+ idct16x16_add_store_bd8(out, dest, stride);
+ } else {
+ idct16x16_add_store(out, dest, stride);
+ }
+ }
+}
+
+void vp9_iht16x16_256_add_neon(const tran_low_t *input, uint8_t *dest,
+ int stride, int tx_type) {
+ static const iht_2d IHT_16[] = {
+ { vpx_idct16x16_256_add_half1d,
+ vpx_idct16x16_256_add_half1d }, // DCT_DCT = 0
+ { vpx_iadst16x16_256_add_half1d,
+ vpx_idct16x16_256_add_half1d }, // ADST_DCT = 1
+ { vpx_idct16x16_256_add_half1d,
+ vpx_iadst16x16_256_add_half1d }, // DCT_ADST = 2
+ { vpx_iadst16x16_256_add_half1d,
+ vpx_iadst16x16_256_add_half1d } // ADST_ADST = 3
+ };
+ const iht_2d ht = IHT_16[tx_type];
+ int16_t row_output[16 * 16];
+
+ // pass 1
+ ht.rows(input, row_output, dest, stride, 0); // upper 8 rows
+ ht.rows(input + 8 * 16, row_output + 8, dest, stride, 0); // lower 8 rows
+
+ // pass 2
+ ht.cols(row_output, NULL, dest, stride, 0); // left 8 columns
+ ht.cols(row_output + 16 * 8, NULL, dest + 8, stride, 0); // right 8 columns
+}
diff --git a/media/libvpx/libvpx/vp9/common/arm/neon/vp9_iht4x4_add_neon.c b/media/libvpx/libvpx/vp9/common/arm/neon/vp9_iht4x4_add_neon.c
new file mode 100644
index 0000000000..4f0a90f215
--- /dev/null
+++ b/media/libvpx/libvpx/vp9/common/arm/neon/vp9_iht4x4_add_neon.c
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2014 The WebM project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ */
+
+#include <arm_neon.h>
+#include <assert.h>
+
+#include "./vp9_rtcd.h"
+#include "./vpx_config.h"
+#include "vp9/common/vp9_common.h"
+#include "vp9/common/arm/neon/vp9_iht_neon.h"
+#include "vpx_dsp/arm/idct_neon.h"
+#include "vpx_dsp/arm/mem_neon.h"
+#include "vpx_dsp/txfm_common.h"
+
+void vp9_iht4x4_16_add_neon(const tran_low_t *input, uint8_t *dest, int stride,
+ int tx_type) {
+ int16x8_t a[2];
+ uint8x8_t s[2], d[2];
+ uint16x8_t sum[2];
+
+ assert(!((intptr_t)dest % sizeof(uint32_t)));
+ assert(!(stride % sizeof(uint32_t)));
+
+ a[0] = load_tran_low_to_s16q(input);
+ a[1] = load_tran_low_to_s16q(input + 8);
+ transpose_s16_4x4q(&a[0], &a[1]);
+
+ switch (tx_type) {
+ case DCT_DCT:
+ idct4x4_16_kernel_bd8(a);
+ a[1] = vcombine_s16(vget_high_s16(a[1]), vget_low_s16(a[1]));
+ transpose_s16_4x4q(&a[0], &a[1]);
+ idct4x4_16_kernel_bd8(a);
+ a[1] = vcombine_s16(vget_high_s16(a[1]), vget_low_s16(a[1]));
+ break;
+
+ case ADST_DCT:
+ idct4x4_16_kernel_bd8(a);
+ a[1] = vcombine_s16(vget_high_s16(a[1]), vget_low_s16(a[1]));
+ transpose_s16_4x4q(&a[0], &a[1]);
+ iadst4(a);
+ break;
+
+ case DCT_ADST:
+ iadst4(a);
+ transpose_s16_4x4q(&a[0], &a[1]);
+ idct4x4_16_kernel_bd8(a);
+ a[1] = vcombine_s16(vget_high_s16(a[1]), vget_low_s16(a[1]));
+ break;
+
+ default:
+ assert(tx_type == ADST_ADST);
+ iadst4(a);
+ transpose_s16_4x4q(&a[0], &a[1]);
+ iadst4(a);
+ break;
+ }
+
+ a[0] = vrshrq_n_s16(a[0], 4);
+ a[1] = vrshrq_n_s16(a[1], 4);
+ s[0] = load_u8(dest, stride);
+ s[1] = load_u8(dest + 2 * stride, stride);
+ sum[0] = vaddw_u8(vreinterpretq_u16_s16(a[0]), s[0]);
+ sum[1] = vaddw_u8(vreinterpretq_u16_s16(a[1]), s[1]);
+ d[0] = vqmovun_s16(vreinterpretq_s16_u16(sum[0]));
+ d[1] = vqmovun_s16(vreinterpretq_s16_u16(sum[1]));
+ store_u8(dest, stride, d[0]);
+ store_u8(dest + 2 * stride, stride, d[1]);
+}
diff --git a/media/libvpx/libvpx/vp9/common/arm/neon/vp9_iht8x8_add_neon.c b/media/libvpx/libvpx/vp9/common/arm/neon/vp9_iht8x8_add_neon.c
new file mode 100644
index 0000000000..46ee632e01
--- /dev/null
+++ b/media/libvpx/libvpx/vp9/common/arm/neon/vp9_iht8x8_add_neon.c
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2014 The WebM project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ */
+
+#include <arm_neon.h>
+#include <assert.h>
+
+#include "./vp9_rtcd.h"
+#include "./vpx_config.h"
+#include "vp9/common/vp9_common.h"
+#include "vp9/common/arm/neon/vp9_iht_neon.h"
+#include "vpx_dsp/arm/idct_neon.h"
+#include "vpx_dsp/arm/mem_neon.h"
+#include "vpx_dsp/arm/transpose_neon.h"
+
+void vp9_iht8x8_64_add_neon(const tran_low_t *input, uint8_t *dest, int stride,
+ int tx_type) {
+ const int16x8_t cospis = vld1q_s16(kCospi);
+ const int16x4_t cospis0 = vget_low_s16(cospis); // cospi 0, 8, 16, 24
+ const int16x4_t cospis1 = vget_high_s16(cospis); // cospi 4, 12, 20, 28
+ int16x8_t a[8];
+
+ a[0] = load_tran_low_to_s16q(input + 0 * 8);
+ a[1] = load_tran_low_to_s16q(input + 1 * 8);
+ a[2] = load_tran_low_to_s16q(input + 2 * 8);
+ a[3] = load_tran_low_to_s16q(input + 3 * 8);
+ a[4] = load_tran_low_to_s16q(input + 4 * 8);
+ a[5] = load_tran_low_to_s16q(input + 5 * 8);
+ a[6] = load_tran_low_to_s16q(input + 6 * 8);
+ a[7] = load_tran_low_to_s16q(input + 7 * 8);
+
+ transpose_s16_8x8(&a[0], &a[1], &a[2], &a[3], &a[4], &a[5], &a[6], &a[7]);
+
+ switch (tx_type) {
+ case DCT_DCT:
+ idct8x8_64_1d_bd8_kernel(cospis0, cospis1, a);
+ transpose_s16_8x8(&a[0], &a[1], &a[2], &a[3], &a[4], &a[5], &a[6], &a[7]);
+ idct8x8_64_1d_bd8_kernel(cospis0, cospis1, a);
+ break;
+
+ case ADST_DCT:
+ idct8x8_64_1d_bd8_kernel(cospis0, cospis1, a);
+ transpose_s16_8x8(&a[0], &a[1], &a[2], &a[3], &a[4], &a[5], &a[6], &a[7]);
+ iadst8(a);
+ break;
+
+ case DCT_ADST:
+ iadst8(a);
+ transpose_s16_8x8(&a[0], &a[1], &a[2], &a[3], &a[4], &a[5], &a[6], &a[7]);
+ idct8x8_64_1d_bd8_kernel(cospis0, cospis1, a);
+ break;
+
+ default:
+ assert(tx_type == ADST_ADST);
+ iadst8(a);
+ transpose_s16_8x8(&a[0], &a[1], &a[2], &a[3], &a[4], &a[5], &a[6], &a[7]);
+ iadst8(a);
+ break;
+ }
+
+ idct8x8_add8x8_neon(a, dest, stride);
+}
diff --git a/media/libvpx/libvpx/vp9/common/arm/neon/vp9_iht_neon.h b/media/libvpx/libvpx/vp9/common/arm/neon/vp9_iht_neon.h
new file mode 100644
index 0000000000..c64822e27c
--- /dev/null
+++ b/media/libvpx/libvpx/vp9/common/arm/neon/vp9_iht_neon.h
@@ -0,0 +1,272 @@
+/*
+ * Copyright (c) 2018 The WebM project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ */
+
+#ifndef VPX_VP9_COMMON_ARM_NEON_VP9_IHT_NEON_H_
+#define VPX_VP9_COMMON_ARM_NEON_VP9_IHT_NEON_H_
+
+#include <arm_neon.h>
+
+#include "./vp9_rtcd.h"
+#include "./vpx_config.h"
+#include "vp9/common/vp9_common.h"
+#include "vpx_dsp/arm/idct_neon.h"
+#include "vpx_dsp/arm/mem_neon.h"
+#include "vpx_dsp/txfm_common.h"
+
+static INLINE void iadst4(int16x8_t *const io) {
+ const int32x4_t c3 = vdupq_n_s32(sinpi_3_9);
+ int16x4_t x[4];
+ int32x4_t s[8], output[4];
+ const int16x4_t c =
+ create_s16x4_neon(sinpi_1_9, sinpi_2_9, sinpi_3_9, sinpi_4_9);
+
+ x[0] = vget_low_s16(io[0]);
+ x[1] = vget_low_s16(io[1]);
+ x[2] = vget_high_s16(io[0]);
+ x[3] = vget_high_s16(io[1]);
+
+ s[0] = vmull_lane_s16(x[0], c, 0);
+ s[1] = vmull_lane_s16(x[0], c, 1);
+ s[2] = vmull_lane_s16(x[1], c, 2);
+ s[3] = vmull_lane_s16(x[2], c, 3);
+ s[4] = vmull_lane_s16(x[2], c, 0);
+ s[5] = vmull_lane_s16(x[3], c, 1);
+ s[6] = vmull_lane_s16(x[3], c, 3);
+ s[7] = vaddl_s16(x[0], x[3]);
+ s[7] = vsubw_s16(s[7], x[2]);
+
+ s[0] = vaddq_s32(s[0], s[3]);
+ s[0] = vaddq_s32(s[0], s[5]);
+ s[1] = vsubq_s32(s[1], s[4]);
+ s[1] = vsubq_s32(s[1], s[6]);
+ s[3] = s[2];
+ s[2] = vmulq_s32(c3, s[7]);
+
+ output[0] = vaddq_s32(s[0], s[3]);
+ output[1] = vaddq_s32(s[1], s[3]);
+ output[2] = s[2];
+ output[3] = vaddq_s32(s[0], s[1]);
+ output[3] = vsubq_s32(output[3], s[3]);
+ dct_const_round_shift_low_8_dual(output, &io[0], &io[1]);
+}
+
+static INLINE void iadst_half_butterfly_neon(int16x8_t *const x,
+ const int16x4_t c) {
+ // Don't add/sub before multiply, which will overflow in iadst8.
+ const int32x4_t x0_lo = vmull_lane_s16(vget_low_s16(x[0]), c, 0);
+ const int32x4_t x0_hi = vmull_lane_s16(vget_high_s16(x[0]), c, 0);
+ const int32x4_t x1_lo = vmull_lane_s16(vget_low_s16(x[1]), c, 0);
+ const int32x4_t x1_hi = vmull_lane_s16(vget_high_s16(x[1]), c, 0);
+ int32x4_t t0[2], t1[2];
+
+ t0[0] = vaddq_s32(x0_lo, x1_lo);
+ t0[1] = vaddq_s32(x0_hi, x1_hi);
+ t1[0] = vsubq_s32(x0_lo, x1_lo);
+ t1[1] = vsubq_s32(x0_hi, x1_hi);
+ x[0] = dct_const_round_shift_low_8(t0);
+ x[1] = dct_const_round_shift_low_8(t1);
+}
+
+static INLINE void iadst_half_butterfly_neg_neon(int16x8_t *const x0,
+ int16x8_t *const x1,
+ const int16x4_t c) {
+ // Don't add/sub before multiply, which will overflow in iadst8.
+ const int32x4_t x0_lo = vmull_lane_s16(vget_low_s16(*x0), c, 1);
+ const int32x4_t x0_hi = vmull_lane_s16(vget_high_s16(*x0), c, 1);
+ const int32x4_t x1_lo = vmull_lane_s16(vget_low_s16(*x1), c, 1);
+ const int32x4_t x1_hi = vmull_lane_s16(vget_high_s16(*x1), c, 1);
+ int32x4_t t0[2], t1[2];
+
+ t0[0] = vaddq_s32(x0_lo, x1_lo);
+ t0[1] = vaddq_s32(x0_hi, x1_hi);
+ t1[0] = vsubq_s32(x0_lo, x1_lo);
+ t1[1] = vsubq_s32(x0_hi, x1_hi);
+ *x1 = dct_const_round_shift_low_8(t0);
+ *x0 = dct_const_round_shift_low_8(t1);
+}
+
+static INLINE void iadst_half_butterfly_pos_neon(int16x8_t *const x0,
+ int16x8_t *const x1,
+ const int16x4_t c) {
+ // Don't add/sub before multiply, which will overflow in iadst8.
+ const int32x4_t x0_lo = vmull_lane_s16(vget_low_s16(*x0), c, 0);
+ const int32x4_t x0_hi = vmull_lane_s16(vget_high_s16(*x0), c, 0);
+ const int32x4_t x1_lo = vmull_lane_s16(vget_low_s16(*x1), c, 0);
+ const int32x4_t x1_hi = vmull_lane_s16(vget_high_s16(*x1), c, 0);
+ int32x4_t t0[2], t1[2];
+
+ t0[0] = vaddq_s32(x0_lo, x1_lo);
+ t0[1] = vaddq_s32(x0_hi, x1_hi);
+ t1[0] = vsubq_s32(x0_lo, x1_lo);
+ t1[1] = vsubq_s32(x0_hi, x1_hi);
+ *x1 = dct_const_round_shift_low_8(t0);
+ *x0 = dct_const_round_shift_low_8(t1);
+}
+
+static INLINE void iadst_butterfly_lane_0_1_neon(const int16x8_t in0,
+ const int16x8_t in1,
+ const int16x4_t c,
+ int32x4_t *const s0,
+ int32x4_t *const s1) {
+ s0[0] = vmull_lane_s16(vget_low_s16(in0), c, 0);
+ s0[1] = vmull_lane_s16(vget_high_s16(in0), c, 0);
+ s1[0] = vmull_lane_s16(vget_low_s16(in0), c, 1);
+ s1[1] = vmull_lane_s16(vget_high_s16(in0), c, 1);
+
+ s0[0] = vmlal_lane_s16(s0[0], vget_low_s16(in1), c, 1);
+ s0[1] = vmlal_lane_s16(s0[1], vget_high_s16(in1), c, 1);
+ s1[0] = vmlsl_lane_s16(s1[0], vget_low_s16(in1), c, 0);
+ s1[1] = vmlsl_lane_s16(s1[1], vget_high_s16(in1), c, 0);
+}
+
+static INLINE void iadst_butterfly_lane_2_3_neon(const int16x8_t in0,
+ const int16x8_t in1,
+ const int16x4_t c,
+ int32x4_t *const s0,
+ int32x4_t *const s1) {
+ s0[0] = vmull_lane_s16(vget_low_s16(in0), c, 2);
+ s0[1] = vmull_lane_s16(vget_high_s16(in0), c, 2);
+ s1[0] = vmull_lane_s16(vget_low_s16(in0), c, 3);
+ s1[1] = vmull_lane_s16(vget_high_s16(in0), c, 3);
+
+ s0[0] = vmlal_lane_s16(s0[0], vget_low_s16(in1), c, 3);
+ s0[1] = vmlal_lane_s16(s0[1], vget_high_s16(in1), c, 3);
+ s1[0] = vmlsl_lane_s16(s1[0], vget_low_s16(in1), c, 2);
+ s1[1] = vmlsl_lane_s16(s1[1], vget_high_s16(in1), c, 2);
+}
+
+static INLINE void iadst_butterfly_lane_1_0_neon(const int16x8_t in0,
+ const int16x8_t in1,
+ const int16x4_t c,
+ int32x4_t *const s0,
+ int32x4_t *const s1) {
+ s0[0] = vmull_lane_s16(vget_low_s16(in0), c, 1);
+ s0[1] = vmull_lane_s16(vget_high_s16(in0), c, 1);
+ s1[0] = vmull_lane_s16(vget_low_s16(in0), c, 0);
+ s1[1] = vmull_lane_s16(vget_high_s16(in0), c, 0);
+
+ s0[0] = vmlal_lane_s16(s0[0], vget_low_s16(in1), c, 0);
+ s0[1] = vmlal_lane_s16(s0[1], vget_high_s16(in1), c, 0);
+ s1[0] = vmlsl_lane_s16(s1[0], vget_low_s16(in1), c, 1);
+ s1[1] = vmlsl_lane_s16(s1[1], vget_high_s16(in1), c, 1);
+}
+
+static INLINE void iadst_butterfly_lane_3_2_neon(const int16x8_t in0,
+ const int16x8_t in1,
+ const int16x4_t c,
+ int32x4_t *const s0,
+ int32x4_t *const s1) {
+ s0[0] = vmull_lane_s16(vget_low_s16(in0), c, 3);
+ s0[1] = vmull_lane_s16(vget_high_s16(in0), c, 3);
+ s1[0] = vmull_lane_s16(vget_low_s16(in0), c, 2);
+ s1[1] = vmull_lane_s16(vget_high_s16(in0), c, 2);
+
+ s0[0] = vmlal_lane_s16(s0[0], vget_low_s16(in1), c, 2);
+ s0[1] = vmlal_lane_s16(s0[1], vget_high_s16(in1), c, 2);
+ s1[0] = vmlsl_lane_s16(s1[0], vget_low_s16(in1), c, 3);
+ s1[1] = vmlsl_lane_s16(s1[1], vget_high_s16(in1), c, 3);
+}
+
+static INLINE int16x8_t add_dct_const_round_shift_low_8(
+ const int32x4_t *const in0, const int32x4_t *const in1) {
+ int32x4_t sum[2];
+
+ sum[0] = vaddq_s32(in0[0], in1[0]);
+ sum[1] = vaddq_s32(in0[1], in1[1]);
+ return dct_const_round_shift_low_8(sum);
+}
+
+static INLINE int16x8_t sub_dct_const_round_shift_low_8(
+ const int32x4_t *const in0, const int32x4_t *const in1) {
+ int32x4_t sum[2];
+
+ sum[0] = vsubq_s32(in0[0], in1[0]);
+ sum[1] = vsubq_s32(in0[1], in1[1]);
+ return dct_const_round_shift_low_8(sum);
+}
+
+static INLINE void iadst8(int16x8_t *const io) {
+ const int16x4_t c0 =
+ create_s16x4_neon(cospi_2_64, cospi_30_64, cospi_10_64, cospi_22_64);
+ const int16x4_t c1 =
+ create_s16x4_neon(cospi_18_64, cospi_14_64, cospi_26_64, cospi_6_64);
+ const int16x4_t c2 =
+ create_s16x4_neon(cospi_16_64, 0, cospi_8_64, cospi_24_64);
+ int16x8_t x[8], t[4];
+ int32x4_t s0[2], s1[2], s2[2], s3[2], s4[2], s5[2], s6[2], s7[2];
+
+ x[0] = io[7];
+ x[1] = io[0];
+ x[2] = io[5];
+ x[3] = io[2];
+ x[4] = io[3];
+ x[5] = io[4];
+ x[6] = io[1];
+ x[7] = io[6];
+
+ // stage 1
+ iadst_butterfly_lane_0_1_neon(x[0], x[1], c0, s0, s1);
+ iadst_butterfly_lane_2_3_neon(x[2], x[3], c0, s2, s3);
+ iadst_butterfly_lane_0_1_neon(x[4], x[5], c1, s4, s5);
+ iadst_butterfly_lane_2_3_neon(x[6], x[7], c1, s6, s7);
+
+ x[0] = add_dct_const_round_shift_low_8(s0, s4);
+ x[1] = add_dct_const_round_shift_low_8(s1, s5);
+ x[2] = add_dct_const_round_shift_low_8(s2, s6);
+ x[3] = add_dct_const_round_shift_low_8(s3, s7);
+ x[4] = sub_dct_const_round_shift_low_8(s0, s4);
+ x[5] = sub_dct_const_round_shift_low_8(s1, s5);
+ x[6] = sub_dct_const_round_shift_low_8(s2, s6);
+ x[7] = sub_dct_const_round_shift_low_8(s3, s7);
+
+ // stage 2
+ t[0] = x[0];
+ t[1] = x[1];
+ t[2] = x[2];
+ t[3] = x[3];
+ iadst_butterfly_lane_2_3_neon(x[4], x[5], c2, s4, s5);
+ iadst_butterfly_lane_3_2_neon(x[7], x[6], c2, s7, s6);
+
+ x[0] = vaddq_s16(t[0], t[2]);
+ x[1] = vaddq_s16(t[1], t[3]);
+ x[2] = vsubq_s16(t[0], t[2]);
+ x[3] = vsubq_s16(t[1], t[3]);
+ x[4] = add_dct_const_round_shift_low_8(s4, s6);
+ x[5] = add_dct_const_round_shift_low_8(s5, s7);
+ x[6] = sub_dct_const_round_shift_low_8(s4, s6);
+ x[7] = sub_dct_const_round_shift_low_8(s5, s7);
+
+ // stage 3
+ iadst_half_butterfly_neon(x + 2, c2);
+ iadst_half_butterfly_neon(x + 6, c2);
+
+ io[0] = x[0];
+ io[1] = vnegq_s16(x[4]);
+ io[2] = x[6];
+ io[3] = vnegq_s16(x[2]);
+ io[4] = x[3];
+ io[5] = vnegq_s16(x[7]);
+ io[6] = x[5];
+ io[7] = vnegq_s16(x[1]);
+}
+
+void vpx_iadst16x16_256_add_half1d(const void *const input, int16_t *output,
+ void *const dest, const int stride,
+ const int highbd_flag);
+
+typedef void (*iht_1d)(const void *const input, int16_t *output,
+ void *const dest, const int stride,
+ const int highbd_flag);
+
+typedef struct {
+ iht_1d cols, rows; // vertical and horizontal
+} iht_2d;
+
+#endif // VPX_VP9_COMMON_ARM_NEON_VP9_IHT_NEON_H_