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author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-28 09:13:47 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-28 09:13:47 +0000 |
commit | 102b0d2daa97dae68d3eed54d8fe37a9cc38a892 (patch) | |
tree | bcf648efac40ca6139842707f0eba5a4496a6dd2 /include/drivers/nxp/qspi | |
parent | Initial commit. (diff) | |
download | arm-trusted-firmware-upstream.tar.xz arm-trusted-firmware-upstream.zip |
Adding upstream version 2.8.0+dfsg.upstream/2.8.0+dfsgupstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'include/drivers/nxp/qspi')
-rw-r--r-- | include/drivers/nxp/qspi/qspi.h | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/include/drivers/nxp/qspi/qspi.h b/include/drivers/nxp/qspi/qspi.h new file mode 100644 index 0000000..db11c3b --- /dev/null +++ b/include/drivers/nxp/qspi/qspi.h @@ -0,0 +1,30 @@ +/* + * Copyright 2021 NXP + * + * SPDX-License-Identifier: BSD-3-Clause + * + */ + +#ifndef QSPI_H +#define QSPI_H + +#include <endian.h> +#include <lib/mmio.h> + +#define CHS_QSPI_MCR 0x01550000 +#define CHS_QSPI_64LE 0xC + +#ifdef NXP_QSPI_BE +#define qspi_in32(a) bswap32(mmio_read_32((uintptr_t)(a))) +#define qspi_out32(a, v) mmio_write_32((uintptr_t)(a), bswap32(v)) +#elif defined(NXP_QSPI_LE) +#define qspi_in32(a) mmio_read_32((uintptr_t)(a)) +#define qspi_out32(a, v) mmio_write_32((uintptr_t)(a), (v)) +#else +#error Please define CCSR QSPI register endianness +#endif + +int qspi_io_setup(uintptr_t nxp_qspi_flash_addr, + size_t nxp_qspi_flash_size, + uintptr_t fip_offset); +#endif /* __QSPI_H__ */ |